Viewing File: <root>/src/mame/drivers/galaga.c

    1  /***************************************************************************
    2  
    3  Bosconian  (c) 1981 Namco
    4  Galaga     (c) 1981 Namco
    5  Xevious    (c) 1982 Namco
    6  Dig Dug    (c) 1982 Namco
    7  
    8  driver by Nicola Salmoria
    9  based on previous work by Martin Scragg, Mirko Buffoni, Aaron Giles
   10  
   11  
   12  All these games are based on the same 3xZ80, shared memory, CPU design.
   13  Bosconian and Galaga use the same CPU board, with minor differences
   14  (Galaga has one missing RAM and no 50XX custom)
   15  Xevious is physically different, but logically identical.
   16  Dig Dug is the only one a bit different, because it reads the dip switches
   17  through a custom chip instead of having them mapped in memory.
   18  
   19  The video board, on the other hand, is completely different for all the games,
   20  that's why they use separate video/ source files.
   21  
   22  
   23  Custom ICs:
   24  ----------
   25  Bosconian:
   26  ---------
   27  CPU board:
   28  06XX     interface to custom 5xXX
   29  07XX     clock divider
   30  08XX(x3) bus controller
   31  50XX     player score control (protection)
   32  51XX     I/O
   33  54XX     explosion sound generator
   34  
   35  Video board:
   36  03XX(x2) ?
   37  05XX     starfield generator
   38  06XX     interface to custom 5xXX
   39  07XX     clock divider
   40  50XX     player score control (only used as protection check)
   41  52XX     sample player
   42  
   43  Galaga:
   44  ------
   45  CPU board:
   46  06XX     interface to custom 5xXX
   47  07XX     clock divider
   48  08XX(x3) bus controller
   49  51XX     I/O
   50  54XX     explosion sound generator
   51  
   52  Video board:
   53  00XX     tilemap address generator with scrolling capability (only Super Pacman)
   54  02XX     gfx data shifter and mixer (16-bit in, 4-bit out)
   55  04XX     sprite address generator
   56  05XX     starfield generator
   57  07XX     clock divider
   58  
   59  Xevious:
   60  -------
   61  CPU board:
   62  06XX     interface to custom 5xXX
   63  07XX     clock divider
   64  08XX(x3) bus controller
   65  50XX     player score control (only used for a protection check on startup)
   66  51XX     I/O
   67  54XX     explosion sound generator
   68  
   69  Video board:
   70  03XX(x2) ?
   71  04XX     sprite address generator
   72  07XX     clock divider
   73  11XX(x2) gfx data shifter and mixer (16-bit in, 4-bit out)
   74  12XX     sprite generator
   75  13XX     dual scrolling tilemap address generator
   76  
   77  Dig Dug:
   78  -------
   79  CPU board:
   80  06XX     interface to custom 5xXX
   81  07XX     clock divider
   82  08XX(x3) bus controller
   83  51XX     I/O
   84  53XX     I/O
   85  
   86  Video board:
   87  00XX     tilemap address generator
   88  02XX     gfx data shifter and mixer (16-bit in, 4-bit out)
   89  04XX     sprite address generator
   90  07XX     clock divider
   91  
   92  
   93  Memory maps:
   94  -----------
   95  Bosconian:
   96  ---------
   97  MAIN CPU:
   98  
   99  Address          Dir Data     Name      Description
  100  ---------------- --- -------- --------- -----------------------
  101  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3N    program ROM
  102  0001xxxxxxxxxxxx R   xxxxxxxx ROM 3M    program ROM
  103  0010xxxxxxxxxxxx R   xxxxxxxx ROM 3L    program ROM
  104  0011xxxxxxxxxxxx R   xxxxxxxx ROM 3K    program ROM
  105  the rest of the memory map is common to the other CPUs
  106  
  107  SUB CPU:
  108  
  109  Address          Dir Data     Name      Description
  110  ---------------- --- -------- --------- -----------------------
  111  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3J    program ROM
  112  0001xxxxxxxxxxxx R   xxxxxxxx ROM 3H    program ROM
  113  0010------------              n.c.
  114  0011------------              n.c.
  115  the rest of the memory map is common to the other CPUs
  116  
  117  SOUND CPU:
  118  
  119  Address          Dir Data     Name      Description
  120  ---------------- --- -------- --------- -----------------------
  121  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3E    program ROM
  122  0001------------              n.c.
  123  0010------------              n.c.
  124  0011------------              n.c.
  125  the rest of the memory map is common to the other CPUs
  126  
  127  COMMON:
  128  
  129  Address          Dir Data     Name      Description
  130  ---------------- --- -------- --------- -----------------------
  131  01000-----------              n.c.
  132  01001-----------              n.c.
  133  01010-----------              n.c.
  134  01011-----------              n.c.
  135  01100-----------              n.c.
  136  01101-----00xxxx   W ----xxxx RAM 2A    \ sound control registers
  137  01101-----01xxxx   W ----xxxx RAM 2B    /
  138  01101-----10-000   W -------x IRQ1      main CPU irq enable/acknowledge
  139  01101-----10-001   W -------x IRQ2      motion CPU irq enable/acknowledge
  140  01101-----10-010   W -------x NMION     sound CPU nmi enable
  141  01101-----10-011   W -------x RESET     reset sub and sound CPU, and 5xXX chips on CPU board
  142  01101-----10-100   W -------x n.c.
  143  01101-----10-101   W -------x MOD 0     unused?
  144  01101-----10-110   W -------x MOD 1     unused?
  145  01101-----10-111   W -------x MOD 2     unused?
  146  01101-----11----   W -------- WDR       watchdog reset
  147  01101-----00-xxx R   -------x DIP SW    dip switch B
  148  01101-----00-xxx R   ------x- DIP SW    dip switch A
  149  01101-----01---- R            n.c.
  150  01101-----10---- R            n.c.
  151  01101-----11---- R            n.c.
  152  01110--0-------- R/W xxxxxxxx I/O       custom 06XX data
  153  01110--1-------- R/W xxxxxxxx I/O       custom 06XX control
  154  01111xxxxxxxxxxx R/W xxxxxxxx RAM 2N    work RAM (not present in Galaga)
  155  10000xxxxxxxxxxx R/W xxxxxxxx DHRAM     tilemap RAM (tile code) [1]
  156  10001xxxxxxxxxxx R/W xxxxxxxx VCRAM     tilemap RAM (tile attr) [1]
  157  10010--0-------- R/W xxxxxxxx EXCS      custom 06XX #2 data
  158  10010--1-------- R/W xxxxxxxx EXCS      custom 06XX #2 control
  159  10011----000xxxx   W ----xxxx SOWR      bullets shape and X pos msb [2]
  160  10011----001----   W xxxxxxxx POSI X    playfield X scroll
  161  10011----010----   W xxxxxxxx POSI Y    playfield Y scroll
  162  10011----011----   W -----xxx STAR      to 05XX: starfield X scroll speed
  163  10011----011----   W --xxx--- STAR      to 05XX: starfield Y scroll speed
  164  10011----100----   W -------- STARCLR   to 05XX: unknown
  165  10011----101----   W          n.c.
  166  10011----110----   W          n.c.
  167  10011----111-000   W -------x FLIP      flip screen
  168  10011----111-001   W -------x n.c.
  169  10011----111-010   W -------x n.c.
  170  10011----111-011   W -------x n.c.
  171  10011----111-100   W -------x BLK 0     \ to 05XX: starfield blink
  172  10011----111-101   W -------x BLK 1     /          (select active subset)
  173  10011----111-110   W -------x n.c.
  174  10011----111-111   W -------x RESET     reset 5xXX chips on video board
  175  10100-----------              n.c.
  176  10101-----------              n.c.
  177  10110-----------              n.c.
  178  10111-----------              n.c.
  179  
  180  [1] 1st half is radar + sprite registers, 2nd half is scrolling playfield
  181  [2] SO = Small Objects? Only locations 4-F are used.
  182  
  183  
  184  Galaga:
  185  ------
  186  MAIN CPU:
  187  
  188  Address          Dir Data     Name      Description
  189  ---------------- --- -------- --------- -----------------------
  190  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3N    program ROM
  191  0001xxxxxxxxxxxx R   xxxxxxxx ROM 3M    program ROM
  192  0010xxxxxxxxxxxx R   xxxxxxxx ROM 3L    program ROM
  193  0011xxxxxxxxxxxx R   xxxxxxxx ROM 3K    program ROM
  194  the rest of the memory map is common to the other CPUs
  195  
  196  SUB CPU:
  197  
  198  Address          Dir Data     Name      Description
  199  ---------------- --- -------- --------- -----------------------
  200  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3J    program ROM
  201  0001------------              n.c.
  202  0010------------              n.c.
  203  0011------------              n.c.
  204  the rest of the memory map is common to the other CPUs
  205  
  206  SOUND CPU:
  207  
  208  Address          Dir Data     Name      Description
  209  ---------------- --- -------- --------- -----------------------
  210  0000xxxxxxxxxxxx R   xxxxxxxx ROM 3E    program ROM
  211  0001------------              n.c.
  212  0010------------              n.c.
  213  0011------------              n.c.
  214  the rest of the memory map is common to the other CPUs
  215  
  216  COMMON:
  217  
  218  Address          Dir Data     Name      Description
  219  ---------------- --- -------- --------- -----------------------
  220  01000-----------              n.c.
  221  01001-----------              n.c.
  222  01010-----------              n.c.
  223  01011-----------              n.c.
  224  01100-----------              n.c.
  225  01101-----00----   W ----xxxx RAM 2A    \ sound control registers
  226  01101-----01----   W ----xxxx RAM 2B    /
  227  01101-----10-000   W -------x IRQ1      main CPU irq enable/acknowledge
  228  01101-----10-001   W -------x IRQ2      motion CPU irq enable/acknowledge
  229  01101-----10-010   W -------x NMION     sound CPU nmi enable
  230  01101-----10-011   W -------x RESET     reset sub and sound CPU, and 5xXX chips on CPU board
  231  01101-----10-100   W -------x n.c.
  232  01101-----10-101   W -------x MOD 0     unused?
  233  01101-----10-110   W -------x MOD 1     unused?
  234  01101-----10-111   W -------x MOD 2     unused?
  235  01101-----11----   W -------- WDR       watchdog reset
  236  01101-----00-xxx R   -------x DIP SW    dip switch B
  237  01101-----00-xxx R   ------x- DIP SW    dip switch A
  238  01101-----01---- R            n.c.
  239  01101-----10---- R            n.c.
  240  01101-----11---- R            n.c.
  241  01110--0-------- R/W xxxxxxxx I/O       custom 06XX data
  242  01110--1-------- R/W xxxxxxxx I/O       custom 06XX control
  243  10000xxxxxxxxxxx R/W xxxxxxxx RAM 1K    tilemap RAM
  244  10001-xxxxxxxxxx R/W xxxxxxxx RAM 3E/3F work RAM
  245  10001-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers
  246  10010-xxxxxxxxxx R/W xxxxxxxx RAM 3K/3L work RAM
  247  10010-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers
  248  10011-xxxxxxxxxx R/W xxxxxxxx RAM 3H/3J work RAM
  249  10011-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers
  250  10100--------000   W -------x           \
  251  10100--------001   W -------x            > to 05XX: starfield X scroll speed
  252  10100--------010   W -------x           /
  253  10100--------011   W -------x           \ to 05XX: starfield blink
  254  10100--------100   W -------x           /          (select active subset)
  255  10100--------101   W -------x           to 05XX: unknown. It is the same as STARCLR in Bosconian
  256  10100--------110   W -------x n.c.
  257  10100--------111   W -------x FLIP      flip screen
  258  10101-----------              n.c.
  259  10110-----------              n.c.
  260  10111-----------              n.c.
  261  
  262  
  263  Namco vs Midway ROM names and locations
  264  ---------------------------------------
  265  Location  ID         Location  ID
  266  --------  ----       --------  -----
  267  CPU 3P    GG1-1      CPU 3N    3200A
  268  CPU 3M    GG1-2      CPU 3M    3300B
  269  CPU 2M    GG1-3      CPU 3L    3400C
  270  CPU 2L    GG1-4      CPU 3K    3500D
  271  CPU 3F    GG1-5      CPU 3J    3600E
  272  CPU 2C    GG1-7      CPU 3E    3700G
  273  CPU 1D    GG1-1[bpr] CPU 1D
  274  CPU 5C    GG1-2[bpr] CPU 5C
  275  
  276  VID 4L    GG1-9      VID 4L    2600J
  277  VID 4F    GG1-10     VID 4F    2700K
  278  VID 4D    GG1-11     VID 4D    2800L
  279  VID 1C    GG1-3[bpr] VID 1C
  280  VID 2N    GG1-4[bpr] VID 2N
  281  VID 5N    GG1-5[bpr] VID 5N
  282  
  283  
  284  Xevious:
  285  -------
  286  MAIN CPU:
  287  
  288  Address          Dir Data     Name      Description
  289  ---------------- --- -------- --------- -----------------------
  290  000xxxxxxxxxxxxx R   xxxxxxxx ROM 1     program ROM
  291  001xxxxxxxxxxxxx R   xxxxxxxx ROM 2     program ROM
  292  the rest of the memory map is common to the other CPUs
  293  
  294  MOTION CPU:
  295  
  296  Address          Dir Data     Name      Description
  297  ---------------- --- -------- --------- -----------------------
  298  000xxxxxxxxxxxxx R   xxxxxxxx ROM 3     program ROM
  299  the rest of the memory map is common to the other CPUs
  300  
  301  SOUND CPU:
  302  
  303  Address          Dir Data     Name      Description
  304  ---------------- --- -------- --------- -----------------------
  305  00-xxxxxxxxxxxxx R   xxxxxxxx ROM 4     program ROM
  306  the rest of the memory map is common to the other CPUs
  307  
  308  COMMON:
  309  a small part of the decoding for the video board is done by a PAL so it is inferred by program behaviour
  310  
  311  Address          Dir Data     Name      Description
  312  ---------------- --- -------- --------- -----------------------
  313  01000-----------              n.c.
  314  01001-----------              n.c.
  315  01010-----------              n.c.
  316  01011-----------              n.c.
  317  01100-----------              n.c.
  318  01101-----00----   W ----xxxx SRAM 0    \ sound control registers
  319  01101-----01----   W ----xxxx SRAM 1    /
  320  01101-----10-000   W -------x IRQ1      main CPU irq enable/acknowledge
  321  01101-----10-001   W -------x IRQ2      motion CPU irq enable/acknowledge
  322  01101-----10-010   W -------x NMION     sound CPU nmi enable
  323  01101-----10-011   W -------x RESET     reset sub and sound CPU, and 5xXX chips on CPU board
  324  01101-----10-100   W -------x n.c.
  325  01101-----10-101   W -------x n.c.
  326  01101-----10-110   W -------x n.c.
  327  01101-----10-111   W -------x n.c.
  328  01101-----11----   W -------- WDR       watchdog reset
  329  01101-----00-xxx R   -------x DIP SW    dip switch B
  330  01101-----00-xxx R   ------x- DIP SW    dip switch A
  331  01101-----01---- R            n.c.
  332  01101-----10---- R            n.c.
  333  01101-----11---- R            n.c.
  334  01110--0-------- R/W xxxxxxxx I/O       custom 06XX data
  335  01110--1-------- R/W xxxxxxxx I/O       custom 06XX control
  336  01111xxxxxxxxxxx R/W xxxxxxxx           work RAM
  337  1000-xxxxxxxxxxx R/W xxxxxxxx           work RAM
  338  1000-1111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x, y)
  339  1001-xxxxxxxxxxx R/W xxxxxxxx           work RAM
  340  1001-1111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (flip, size)
  341  1010-xxxxxxxxxxx R/W xxxxxxxx           work RAM
  342  1010-1111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (sprite number & color)
  343  10110xxxxxxxxxxx R/W xxxxxxxx PF0       fg tilemap RAM (tile attributes)
  344  10111xxxxxxxxxxx R/W xxxxxxxx PF1       bg tilemap RAM (tile attributes)
  345  11000xxxxxxxxxxx R/W xxxxxxxx PF2       fg tilemap RAM (tile code)
  346  11001xxxxxxxxxxx R/W xxxxxxxx PF3       bg tilemap RAM (tile code)
  347  1101-----000---x   W xxxxxxxx           bg X scroll (9-bit data: A0 is the msb)
  348  1101-----001---x   W xxxxxxxx           fg X scroll (9-bit data: A0 is the msb)
  349  1101-----010---x   W xxxxxxxx           bg Y scroll (9-bit data: A0 is the msb)
  350  1101-----011---x   W xxxxxxxx           fg Y scroll (9-bit data: A0 is the msb)
  351  1101-----111----   W -------x FLIP      flip screen
  352  1110------------              n.c.
  353  1111-----------0   W xxxxxxxx BS0       \ address to read from background data ROMs
  354  1111-----------1   W xxxxxxxx BS1       / (see xevious_bb_r)
  355  1111-----------0 R   xxxxxxxx BB0       \ read from background data ROMs
  356  1111-----------1 R   xxxxxxxx BB1       /
  357  
  358  
  359  Namco vs Atari ROM names and locations
  360  --------------------------------------
  361  Location  ID          Location  ID
  362  --------  ----        --------  ----------
  363  CPU 3P    XVI-1       CPU 1M    136018-118
  364  CPU 3M    XVI-2        "   "      "     "
  365  CPU 2M    XVI-3       CPU 1L    136018-119
  366  CPU 2L    XVI-4        "   "      "     "
  367  CPU 3F    XVI-5       CPU 4C    136018-120
  368  CPU 3J    XVI-6        "   "      "     "
  369  CPU 2C    XVI-7       CPU 2C    136018-127
  370  CPU 5N    XVI-1[bpr]  CPU 6M    136018-028
  371  CPU 7N    XVI-2[bpr]  CPU 8M    136018-029
  372  
  373  VID 2A    XVI-9       VID 2A    136018-101
  374  VID 2B    XVI-10      VID 2B    136018-102
  375  VID 2C    XVI-11      VID 2C    136018-103
  376  VID 3B    XVI-12      VID 3B    136018-104
  377  VID 3C    XVI-13      VID 3C    136018-105
  378  VID 3D    XVI-14      VID 3D    136018-106
  379  VID 4M    XVI-15      VID 4M    136018-107
  380  VID 4N    XVI-16      VID 4N    136018-108
  381  VID 4P    XVI-17      VID 4P    136018-109
  382  VID 4R    XVI-18      VID 4R    136018-110
  383  VID 3L    XVI-4[bpr]  VID 3L    136018-011
  384  VID 3M    XVI-5[bpr]  VID 3M    136018-012
  385  VID 4F    XVI-6[bpr]  VID 4F    136018-013
  386  VID 4H    XVI-7[bpr]  VID 4H    136018-014
  387  VID 6A    XVI-8[bpr]  VID 6A    136018-015
  388  VID 6D    XVI-9[bpr]  VID 6D    136018-016
  389  VID 6E    XVI-10[bpr] VID 6E    136018-017
  390  
  391  
  392  Dig Dug:
  393  -------
  394  MAIN CPU:
  395  
  396  Address          Dir Data     Name      Description
  397  ---------------- --- -------- --------- -----------------------
  398  0000xxxxxxxxxxxx R   xxxxxxxx ROM 0     program ROM
  399  0001xxxxxxxxxxxx R   xxxxxxxx ROM 1     program ROM
  400  0010xxxxxxxxxxxx R   xxxxxxxx ROM 2     program ROM
  401  0011xxxxxxxxxxxx R   xxxxxxxx ROM 3     program ROM
  402  the rest of the memory map is common to the other CPUs
  403  
  404  SUB CPU:
  405  
  406  Address          Dir Data     Name      Description
  407  ---------------- --- -------- --------- -----------------------
  408  0000xxxxxxxxxxxx R   xxxxxxxx ROM 4     program ROM
  409  0001xxxxxxxxxxxx R   xxxxxxxx ROM 5     program ROM
  410  0010------------              n.c.
  411  0011------------              n.c.
  412  the rest of the memory map is common to the other CPUs
  413  
  414  SOUND CPU:
  415  
  416  Address          Dir Data     Name      Description
  417  ---------------- --- -------- --------- -----------------------
  418  0000xxxxxxxxxxxx R   xxxxxxxx ROM 6     program ROM
  419  0001xxxxxxxxxxxx R   xxxxxxxx ROM 7     program ROM (optional, not used)
  420  0010------------              n.c.
  421  0011------------              n.c.
  422  the rest of the memory map is common to the other CPUs
  423  
  424  COMMON:
  425  
  426  Address          Dir Data     Name      Description
  427  ---------------- --- -------- --------- -----------------------
  428  01000-----------              n.c.
  429  01001-----------              n.c.
  430  01010-----------              n.c.
  431  01011-----------              n.c.
  432  01100-----------              n.c.
  433  01101-----00----   W ----xxxx AUDIO 0   \ sound control registers
  434  01101-----01----   W ----xxxx AUDIO 1   /
  435  01101-----10-000   W -------x IRQ1      main CPU irq enable/acknowledge
  436  01101-----10-001   W -------x IRQ2      sub CPU irq enable/acknowledge
  437  01101-----10-010   W -------x NMION     sound CPU nmi enable
  438  01101-----10-011   W -------x RESET     reset sub and sound CPU, and 5xXX chips on CPU board
  439  01101-----10-100   W -------x n.c.
  440  01101-----10-101   W -------x MOD 0     \
  441  01101-----10-110   W -------x MOD 1     | to custom 53XX
  442  01101-----10-111   W -------x MOD 2     /
  443  01101-----11----   W -------- WDDIS     watchdog reset
  444  01110--0-------- R/W xxxxxxxx I/O       custom 06XX data
  445  01110--1-------- R/W xxxxxxxx I/O       custom 06XX control
  446  01111-----------              n.c.
  447  10000xxxxxxxxxxx R/W xxxxxxxx RAM 0     tilemap RAM + work RAM
  448  10001-xxxxxxxxxx R/W xxxxxxxx OBJRAM    work RAM
  449  10001-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (sprite number and color)
  450  10010-xxxxxxxxxx R/W xxxxxxxx POSRAM    work RAM
  451  10010-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x and y)
  452  10011-xxxxxxxxxx R/W xxxxxxxx FLPRAM    work RAM
  453  10011-111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (flip)
  454  10100--------000   W -------x           \ background ROM (114) bank select
  455  10100--------001   W -------x           /
  456  10100--------010   W -------x           tilemap color select (low or high 4 bits of tilemap RAM)
  457  10100--------011   W -------x           background enable
  458  10100--------100   W -------x           \ background color lookup PROM (112) bank select
  459  10100--------101   W -------x           /
  460  10100--------110   W -------x n.c.
  461  10100--------111   W -------x FLIP      flip screen
  462  10101-----------              n.c.
  463  10110-----------              n.c.
  464  10111----0xxxxxx   W xxxxxxxx EAROM     non volatile memory address latch and data write
  465  10111----0------ R   xxxxxxxx EAROM     non volatile memory read
  466  10111----1------   W ----xxxx EAROM     non volatile memory control
  467  
  468  
  469  
  470  Namco vs Atari ROM names and locations
  471  --------------------------------------
  472  The Namco version is composed of two boards, while the Atari version is
  473  single board. There are two revisions of the Atari version.
  474  
  475  Location  ID        Location  Location  ID
  476                      (type 1)  (type 2)
  477  --------  ----      --------  --------  ----------
  478  CPU 3P    DD1-1     6L        2C/D      136007-101
  479  CPU 3M    DD1-2     6M        2E        136007-102
  480  CPU 2M    DD1-3     6N/P      2B/C      136007-103
  481  CPU 2L    DD1-4     6R        2A        136007-104
  482  CPU 3F    DD1-5     6C        2P        136007-105
  483  CPU 3J    DD1-6     6D        2N        136007-106
  484  CPU 2C    DD1-7     5L        2K/L      136007-107
  485  CPU 5N    [bpr]     2K/L      10A       136007-109
  486  CPU 7N    [bpr]     2P        11A       136007-110
  487  
  488  VID 2C    DD1-9     8R        5K        136007-108
  489  VID 1C    [bpr]     4G        8F        136007-111
  490  VID 2N    [bpr]     10K/L     4N        136007-112
  491  VID 5N    [bpr]     1R        8L        136007-113
  492  VID 2D    DD1-10    9N        4J        136007-114
  493  VID 5C    DD1-11    10C/D     4F        136007-115
  494  VID 5F    DD1-12    7A/B      5B        136007-119
  495  VID 5H    DD1-13    8A/B      5A        136007-118
  496  VID 5J    DD1-14    7C        5C        136007-117
  497  VID 5K    DD1-15    8C        5D        136007-116
  498  
  499  
  500  
  501  Gatsbee (Galaga mod/bootleg)
  502  ----------------------------
  503  This game runs on modified bootleg Galaga hardware (blue board with PCB numbers DG-09-02 and DG-07-02)
  504  
  505  ROM8: is a 2764. pins 1, 26, 27, 28 tied together.
  506        pin2 out of socket, has wire that is tied to pin 4 of a LS259 that sits on top of the main Z80
  507        CPU located at 5B/6B
  508  
  509  Z80: There are 2 logic chips sitting on top of it which are wired up to the Z80 and to each other.
  510       Looks like this....
  511       |-------------------|
  512       |  LS32   LS259     <
  513       |-------------------|
  514  
  515  Bend all the legs outwards.
  516  Line up the LS259 so pin 16 is in line with Z80 pin 11
  517  Line up the LS32 so pin 7 is in line with Z80 pin 29
  518  Atach the 2 chips to the top of the Z80 with some glue
  519  Connect like this....
  520  
  521  LS32 pin 1 tied to Z80 pin 22
  522  LS32 pin 2 tied to Z80 pin 19
  523  LS32 pin 3,4 tied together
  524  LS32 pin 5 tied to Z80 pin 4
  525  LS32 pin 6 tied to pin 10 LS32
  526  LS32 pin 7 tied to Z80 pin 29 (GND)
  527  LS32 pin 8 tied to LS259 pin 14
  528  LS32 pin 9 tied to Z80 pin 5
  529  LS32 pins 11, 12, 13 have NC
  530  LS32 pin 14 tied to Z80 pin 11 (+5V)
  531  
  532  LS259 pin 1 tied to Z80 pin 30
  533  LS259 pin 2 tied to Z80 pin 31
  534  LS259 pin 3 tied to Z80 pin 32
  535  LS259 pin 4 to ROM 8 (as above)
  536  LS259 pins 5, 6, 7 have NC
  537  LS259 pin 8 tied to Z80 pin 29 (GND)
  538  LS259 pins 9, 10, 11, 12 have NC
  539  LS259 pin 13 tied to Z80 pin 14
  540  LS259 pin 15 tied to Z80 pin 26
  541  LS259 pin 16 tied to Z80 pin 11
  542  
  543  
  544  
  545  Easter eggs:
  546  -----------
  547  - Bosconian:
  548    - enter service mode
  549    - keep B1 pressed and enter the following sequence:
  550      5xU 6xR 1xD 4xL
  551    (c) 1981 NAMCO LTD. will be added at the bottom of the screen.
  552  
  553  - Galaga:
  554    - enter service mode
  555    - keep B1 pressed and enter the following sequence:
  556      5xR 6xL 3xR 7xL
  557    (c) 1981 NAMCO LTD. will appear on the screen.
  558  
  559  - Xevious:
  560    - start a game
  561    - go to the bottom right of the screen and keep B2 pressed
  562    NAMCO ORIGINAL
  563    program by EVEZOO
  564    will be written at the bottom of the screen
  565    In Super Xevious this is changed to
  566    special thanks for you
  567    by game designer EVEZOO
  568  
  569  - Dig Dug:
  570    - enter service mode
  571    - keep B1 pressed and enter the following sequence:
  572      6xU 3xR 4xD 8xL
  573    (c) 1982 NAMCO LTD. will appear on the screen.
  574  
  575  
  576  Notes:
  577  -----
  578  - The Cabinet Type "dip switch" actually comes from the edge connector, but is mapped
  579    in memory in place of dip switch #8. dip switch #8 selects single/dual coin counters
  580    and is entirely handled by hardware.
  581  
  582  - galaga: there is a bug in the sound CPU program. During initialization, it enables
  583    NMI before clearing RAM, but the NMI handler doesn't save the registers, so it cannot
  584    interrupt program execution. If the NMI happens before the LDIR that clears RAM has
  585    finished, the program will crash.
  586  
  587  - galaga: there were "fast shoot" hacks available, which are not supported.
  588    Their effects can be replicated with this line in cheat.dat:
  589    galaga:1:070D:0D:100:Fast Shoot
  590  
  591  - bosco: there appears to be a bug in the code at 0BB1, which handles communication
  592    with the 06XX custom chip. First it saves in A' the command to write, then if a
  593    transfer is still in progress it jups to 0BC1, does other things, then restores
  594    the command from A' and stores it in RAM. At that point (0BE1) it checks again if
  595    a transfer is in progress. If the trasnfer has terminated, it jumps to 0BEB, which
  596    restores the command from RAM, and jumps back to 0BBA to send the command. However,
  597    the instruction at 0BBA is ex af,af', so the command is overwritten with garbage.
  598    There's also an exx at 0BBB which seems unnecessary but that's harmless.
  599    Anyway, what this bug means is that we must make sure that the 06XX generates NMIs
  600    quickly enough to ensure that 0BB1 is usually not called with a transfer still is
  601      progress. It doesn't seem possible to prevent it altogether though, so we can only
  602      hope that the transfer doesn't terminate in the middle of the function.
  603  
  604  - bosco: we have two dumps of the sound shape ROM, "prom.1d" and "bosco.spr". Music
  605    changes a lot from one version to the other.
  606    I'm using the former because it is more similar to the other Namco games. The latter,
  607    after masking off the unused top 4 bits and inverting bit 3, matches the Galaga one,
  608    so it might have come from a (bootleg?) conversion.
  609  
  610  - bosco & galaga: the Midway arcade cabinet had an optional rapid fire board, using
  611    a 556 to generate autofire while the button was held. That really makes little
  612    sense in Galaga! For Bosconian, I guess it was for the boscomdo set I, because the
  613    other sets have autofire built-in.
  614  
  615  - the bosconian video system is (apart from the starfield) almost identical functionally
  616    to Rally X, but the hardware is quite different: Rally X has no custom ICs.
  617  
  618  - digdug: if you enter service mode and press press service coin something like
  619    the following is written at the bottom of the screen:
  620    99.9999.9999.9999.9999.
  621    This is explained in the manual: it is the number of games played, of points, etc.
  622    The counters start from 999 and count backwards.
  623  
  624  - gallag is identical to galagao, apart from the title changed to "GALLAG" and the
  625    copyright notice changed from "(c) 1981 NAMCO LTD" to "1 9 8 2" (and the Namco logo
  626    removed from the gfx). The only interesting thing about it is the 4th Z80, used to
  627    simulate the custom 5xXX chips of the original.
  628    It also has different explosion and starfield circuitries, to do without the Namco
  629    custom chips.
  630  
  631  - differences between versions of digdug:
  632    - the background graphics are slightly different in the Atari versions; the earth is
  633      less regular.
  634  
  635    - "digduga1" is identical to "digdugb", apart from the gfx and copyright notices
  636      changed from "NAMCO LTD." to "ATARI INC.".
  637  
  638    - "digdug" fixes two bugs that were present in "digdugb":  First, as monster speed
  639      increased in later rounds it could eventually roll over to 0, causing the monsters
  640      to stop moving altogether.  Second, "double-killing" a monster by bursting it and
  641      immediately dropping a rock on the corpse could result in the round not ending
  642      even after all monsters were killed.
  643      This set also has the code to save high scores to EEPROM rewritten, though the
  644      reason for the changes is unclear.
  645  
  646    - "digdugat" is almost identical to "digdug" (apart from the Atari gfx/copyright
  647      changes), but there are three added instructions in the CPU0 program that change
  648      the code alignment.  The change eliminates the "kill screen" at round 256 by
  649      making the round number roll over to 156, and hides the rollover from the player
  650      by only ever displaying the lower two digits of the round number.  Interestingly,
  651      "digdug" actually contains all the code to implement the rollover (at $0018-$0026)
  652      but just doesn't call it, implying that Namco deliberately chose to keep the kill
  653      screen in this version.
  654  
  655    - "digsid" is intermediate between "digdugb" and "digdug"; it has the changed EEPROM
  656      handling, but not the gameplay bug fixes.  It has some unique changes as well:
  657      the initial high scores are 25000 instead of 10000, and the game begins on the
  658      screen that is round 4 in the other sets, skipping the first three screens.
  659      The latter change seems likely to have been done by Namco themselves and not by
  660      Sidam, as it involves insertion of code right in the middle of the CPU0 program
  661      and realignment of all the code after the insertion.
  662  
  663    - "dzigzag" and "digdugb" are identical, apart from the hacked gfx and the copyright
  664      notices changed from "NAMCO LTD." to "1 9 8 2".  It's a bootleg of "digdugb", and
  665      not of "digduga1", because the hidden "NAMCO" string at offset 0x1eea of CPU2 is
  666      still present, while it is replaced by "ATARI" in digduga1.
  667      The only interesting thing about the bootleg is the 4th Z80, used to simulate
  668      the custom 5xXX chips of the original.
  669  
  670  
  671  TODO:
  672  ----
  673  - bosco & galaga:
  674    - the starfield is wrong.
  675    - The function of STARCLR is unknown. It is not latched and there are no data bits
  676      used...
  677  
  678  - bosco: is the scrolling tilemap placement correct? It is currently aligned so that
  679    the test grid shown on startup is correct, but this way an unerased grey strip
  680    remains on the left of the screen during the title sequence.
  681  
  682  - gallag/gatsbee: explosions are not emulated since the bootleg board doesn't have
  683    the 54XX custom. Should probably use samples like Battles?
  684  
  685  - Xevios: emulate the 4th Z80 (ROM dump is complete)
  686  
  687  - xevious: I haven't found any Easter egg in service mode. The main loop is very
  688    simple so there might just not be one, though this would be the only Namco game
  689    of that era to not have a service mode Easter egg. On the other hand, the service
  690    mode in this game is VERY spartan when compared to the other Namco games.
  691  
  692  - dzigzag: emulate the 4th CPU (should be similar to battles)
  693  
  694  ***************************************************************************/
  695  
  696  #include "emu.h"
  697  #include "cpu/z80/z80.h"
  698  #include "cpu/mb88xx/mb88xx.h"
  699  #include "machine/atari_vg.h"
  700  #include "machine/namco06.h"
  701  #include "machine/namco50.h"
  702  #include "machine/namco51.h"
  703  #include "machine/namco53.h"
  704  #include "includes/galaga.h"
  705  #include "sound/namco.h"
  706  #include "audio/namco52.h"
  707  #include "machine/rescap.h"
  708  #include "sound/samples.h"
  709  #include "audio/namco54.h"
  710  
  711  #define MASTER_CLOCK (XTAL_18_432MHz)
  712  
  713  
  714  
  715  READ8_MEMBER(galaga_state::bosco_dsw_r)
  716  {
  717      int bit0,bit1;
  718  
  719      bit0 = (ioport("DSWB")->read() >> offset) & 1;
  720      bit1 = (ioport("DSWA")->read() >> offset) & 1;
  721  
  722      return bit0 | (bit1 << 1);
  723  }
  724  
  725  WRITE8_MEMBER(galaga_state::galaga_flip_screen_w)
  726  {
  727      flip_screen_set(data & 1);
  728  }
  729  
  730  WRITE8_MEMBER(bosco_state::bosco_flip_screen_w)
  731  {
  732      flip_screen_set(~data & 1);
  733  }
  734  
  735  
  736  WRITE8_MEMBER(galaga_state::bosco_latch_w)
  737  {
  738      switch (offset)
  739      {
  740          case 0x00:  /* IRQ1 */
  741              m_main_irq_mask = data & 1;
  742              if (!m_main_irq_mask)
  743                  machine().device("maincpu")->execute().set_input_line(0, CLEAR_LINE);
  744              break;
  745  
  746          case 0x01:  /* IRQ2 */
  747              m_sub_irq_mask = data & 1;
  748              if (!m_sub_irq_mask)
  749                  machine().device("sub")->execute().set_input_line(0, CLEAR_LINE);
  750              break;
  751  
  752          case 0x02:  /* NMION */
  753              m_sub2_nmi_mask = !(data & 1);
  754              break;
  755  
  756          case 0x03:  /* RESET */
  757              machine().device("sub")->execute().set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
  758              machine().device("sub2")->execute().set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
  759              break;
  760  
  761          case 0x04:  /* n.c. */
  762              break;
  763  
  764          case 0x05:  /* MOD 0 (xevious: n.c.) */
  765              m_custom_mod = (m_custom_mod & ~0x01) | ((data & 1) << 0);
  766              break;
  767  
  768          case 0x06:  /* MOD 1 (xevious: n.c.) */
  769              m_custom_mod = (m_custom_mod & ~0x02) | ((data & 1) << 1);
  770              break;
  771  
  772          case 0x07:  /* MOD 2 (xevious: n.c.) */
  773              m_custom_mod = (m_custom_mod & ~0x04) | ((data & 1) << 2);
  774              break;
  775      }
  776  }
  777  
  778  CUSTOM_INPUT_MEMBER(digdug_state::shifted_port_r){ return ioport((const char *)param)->read() >> 4; }
  779  
  780  WRITE8_MEMBER(galaga_state::out_0)
  781  {
  782      set_led_status(machine(), 1,data & 1);
  783      set_led_status(machine(), 0,data & 2);
  784      coin_counter_w(machine(), 1,~data & 4);
  785      coin_counter_w(machine(), 0,~data & 8);
  786  }
  787  
  788  WRITE8_MEMBER(galaga_state::out_1)
  789  {
  790      coin_lockout_global_w(machine(), data & 1);
  791  }
  792  
  793  static const namco_51xx_interface namco_51xx_intf =
  794  {
  795      {   /* port read handlers */
  796          DEVCB_INPUT_PORT("IN0L"),
  797          DEVCB_INPUT_PORT("IN0H"),
  798          DEVCB_INPUT_PORT("IN1L"),
  799          DEVCB_INPUT_PORT("IN1H")
  800      },
  801      {   /* port write handlers */
  802          DEVCB_DRIVER_MEMBER(galaga_state,out_0),
  803          DEVCB_DRIVER_MEMBER(galaga_state,out_1)
  804      }
  805  };
  806  
  807  
  808  READ8_MEMBER(galaga_state::namco_52xx_rom_r)
  809  {
  810      UINT32 length = machine().root_device().memregion("52xx")->bytes();
  811  //printf("ROM read %04X\n", offset);
  812      if (!(offset & 0x1000))
  813          offset = (offset & 0xfff) | 0x0000;
  814      else if (!(offset & 0x2000))
  815          offset = (offset & 0xfff) | 0x1000;
  816      else if (!(offset & 0x4000))
  817          offset = (offset & 0xfff) | 0x2000;
  818      else if (!(offset & 0x8000))
  819          offset = (offset & 0xfff) | 0x3000;
  820      return (offset < length) ? machine().root_device().memregion("52xx")->base()[offset] : 0xff;
  821  }
  822  
  823  READ8_MEMBER(galaga_state::namco_52xx_si_r)
  824  {
  825      /* pulled to GND */
  826      return 0;
  827  }
  828  
  829  static const namco_52xx_interface namco_52xx_intf =
  830  {
  831      "discrete",                         /* name of the discrete sound device */
  832      NODE_04,                            /* index of the first node */
  833      ATTOSECONDS_IN_NSEC(PERIOD_OF_555_ASTABLE_NSEC(RES_K(33), RES_K(10), CAP_U(0.0047))),   /* external clock rate */
  834      DEVCB_DRIVER_MEMBER(galaga_state,namco_52xx_rom_r), /* ROM read handler */
  835      DEVCB_DRIVER_MEMBER(galaga_state,namco_52xx_si_r)       /* SI (pin 6) read handler */
  836  };
  837  
  838  
  839  READ8_MEMBER(galaga_state::custom_mod_r)
  840  {
  841      /* MOD0-2 is connected to K1-3; K0 is left unconnected */
  842      return m_custom_mod << 1;
  843  }
  844  
  845  static const namco_53xx_interface namco_53xx_intf =
  846  {
  847      DEVCB_DRIVER_MEMBER(galaga_state,custom_mod_r),     /* K port */
  848      {
  849          DEVCB_INPUT_PORT("DSWA"),       /* R0 port */
  850          DEVCB_INPUT_PORT("DSWA_HI"),    /* R1 port */
  851          DEVCB_INPUT_PORT("DSWB"),       /* R2 port */
  852          DEVCB_INPUT_PORT("DSWB_HI")     /* R3 port */
  853      },
  854      DEVCB_NULL                          /* P port */
  855  };
  856  
  857  
  858  TIMER_CALLBACK_MEMBER(galaga_state::cpu3_interrupt_callback)
  859  {
  860      int scanline = param;
  861  
  862      if(m_sub2_nmi_mask)
  863          nmi_line_pulse(machine().device("sub2")->execute());
  864  
  865      scanline = scanline + 128;
  866      if (scanline >= 272)
  867          scanline = 64;
  868  
  869      /* the vertical synch chain is clocked by H256 -- this is probably not important, but oh well */
  870      m_cpu3_interrupt_timer->adjust(machine().primary_screen->time_until_pos(scanline), scanline);
  871  }
  872  
  873  
  874  MACHINE_START_MEMBER(galaga_state,galaga)
  875  {
  876      /* create the interrupt timer */
  877      m_cpu3_interrupt_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(galaga_state::cpu3_interrupt_callback),this));
  878      m_custom_mod = 0;
  879      state_save_register_global(machine(), m_custom_mod);
  880      save_item(NAME(m_main_irq_mask));
  881      save_item(NAME(m_sub_irq_mask));
  882      save_item(NAME(m_sub2_nmi_mask));
  883  }
  884  
  885  void galaga_state::bosco_latch_reset()
  886  {
  887      address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
  888      int i;
  889  
  890      /* Reset all latches */
  891      for (i = 0;i < 8;i++)
  892          bosco_latch_w(space,i,0);
  893  }
  894  
  895  MACHINE_RESET_MEMBER(galaga_state,galaga)
  896  {
  897      /* Reset all latches */
  898      bosco_latch_reset();
  899  
  900      m_cpu3_interrupt_timer->adjust(machine().primary_screen->time_until_pos(64), 64);
  901  }
  902  
  903  MACHINE_RESET_MEMBER(xevious_state,battles)
  904  {
  905      MACHINE_RESET_CALL_MEMBER(galaga);
  906      battles_customio_init();
  907  }
  908  
  909  
  910  /* the same memory map is used by all three CPUs; all RAM areas are shared */
  911  static ADDRESS_MAP_START( bosco_map, AS_PROGRAM, 8, bosco_state )
  912      AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP         /* the only area different for each CPU */
  913      AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
  914      AM_RANGE(0x6800, 0x681f) AM_DEVWRITE_LEGACY("namco", pacman_sound_w)
  915      AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w)                        /* misc latches */
  916      AM_RANGE(0x6830, 0x6830) AM_WRITE(watchdog_reset_w)
  917      AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE_LEGACY("06xx_0", namco_06xx_data_r, namco_06xx_data_w)
  918      AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE_LEGACY("06xx_0", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
  919      AM_RANGE(0x7800, 0x7fff) AM_RAM AM_SHARE("share1")
  920      AM_RANGE(0x8000, 0x8fff) AM_RAM_WRITE(bosco_videoram_w) AM_SHARE("videoram")/* + sprite registers */
  921      AM_RANGE(0x9000, 0x90ff) AM_DEVREADWRITE_LEGACY("06xx_1", namco_06xx_data_r, namco_06xx_data_w)
  922      AM_RANGE(0x9100, 0x9100) AM_DEVREADWRITE_LEGACY("06xx_1", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
  923      AM_RANGE(0x9800, 0x980f) AM_WRITEONLY AM_SHARE("bosco_radarattr")
  924      AM_RANGE(0x9810, 0x9810) AM_WRITE(bosco_scrollx_w)
  925      AM_RANGE(0x9820, 0x9820) AM_WRITE(bosco_scrolly_w)
  926      AM_RANGE(0x9830, 0x9830) AM_WRITEONLY AM_SHARE("starcontrol")
  927      AM_RANGE(0x9840, 0x9840) AM_WRITE(bosco_starclr_w)
  928      AM_RANGE(0x9870, 0x9870) AM_WRITE(bosco_flip_screen_w)
  929      AM_RANGE(0x9874, 0x9875) AM_WRITEONLY AM_SHARE("bosco_starblink")
  930  ADDRESS_MAP_END
  931  
  932  
  933  static ADDRESS_MAP_START( galaga_map, AS_PROGRAM, 8, galaga_state )
  934      AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP         /* the only area different for each CPU */
  935      AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
  936      AM_RANGE(0x6800, 0x681f) AM_DEVWRITE_LEGACY("namco", pacman_sound_w)
  937      AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w)                        /* misc latches */
  938      AM_RANGE(0x6830, 0x6830) AM_WRITE(watchdog_reset_w)
  939      AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_data_r, namco_06xx_data_w)
  940      AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
  941      AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(galaga_videoram_w) AM_SHARE("videoram")
  942      AM_RANGE(0x8800, 0x8bff) AM_RAM AM_SHARE("galaga_ram1")
  943      AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("galaga_ram2")
  944      AM_RANGE(0x9800, 0x9bff) AM_RAM AM_SHARE("galaga_ram3")
  945      AM_RANGE(0xa000, 0xa005) AM_WRITEONLY AM_SHARE("starcontrol")
  946      AM_RANGE(0xa007, 0xa007) AM_WRITE(galaga_flip_screen_w)
  947  ADDRESS_MAP_END
  948  
  949  
  950  static ADDRESS_MAP_START( xevious_map, AS_PROGRAM, 8, xevious_state )
  951      AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP         /* the only area different for each CPU */
  952      AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
  953      AM_RANGE(0x6800, 0x681f) AM_DEVWRITE_LEGACY("namco", pacman_sound_w)
  954      AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w)    /* misc latches */
  955      AM_RANGE(0x6830, 0x6830) AM_WRITE(watchdog_reset_w)
  956      AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_data_r, namco_06xx_data_w)
  957      AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
  958      AM_RANGE(0x7800, 0x7fff) AM_RAM AM_SHARE("share1")                          /* work RAM */
  959      AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("xevious_sr1") /* work RAM + sprite registers */
  960      AM_RANGE(0x9000, 0x97ff) AM_RAM AM_SHARE("xevious_sr2") /* work RAM + sprite registers */
  961      AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_SHARE("xevious_sr3") /* work RAM + sprite registers */
  962      AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(xevious_fg_colorram_w) AM_SHARE("fg_colorram")
  963      AM_RANGE(0xb800, 0xbfff) AM_RAM_WRITE(xevious_bg_colorram_w) AM_SHARE("bg_colorram")
  964      AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(xevious_fg_videoram_w) AM_SHARE("fg_videoram")
  965      AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(xevious_bg_videoram_w) AM_SHARE("bg_videoram")
  966      AM_RANGE(0xd000, 0xd07f) AM_WRITE(xevious_vh_latch_w)
  967      AM_RANGE(0xf000, 0xffff) AM_READWRITE(xevious_bb_r, xevious_bs_w)
  968  ADDRESS_MAP_END
  969  
  970  
  971  static ADDRESS_MAP_START( digdug_map, AS_PROGRAM, 8, digdug_state )
  972      AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP         /* the only area different for each CPU */
  973      AM_RANGE(0x6800, 0x681f) AM_DEVWRITE_LEGACY("namco", pacman_sound_w)
  974      AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w)                        /* misc latches */
  975      AM_RANGE(0x6830, 0x6830) AM_WRITE(watchdog_reset_w)
  976      AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_data_r, namco_06xx_data_w)
  977      AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE_LEGACY("06xx", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
  978      AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(digdug_videoram_w) AM_SHARE("videoram") /* tilemap RAM (bottom half of RAM 0 */
  979      AM_RANGE(0x8400, 0x87ff) AM_RAM AM_SHARE("share1")                          /* work RAM (top half for RAM 0 */
  980      AM_RANGE(0x8800, 0x8bff) AM_RAM AM_SHARE("digdug_objram")   /* work RAM + sprite registers */
  981      AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("digdug_posram")   /* work RAM + sprite registers */
  982      AM_RANGE(0x9800, 0x9bff) AM_RAM AM_SHARE("digdug_flpram")   /* work RAM + sprite registers */
  983      AM_RANGE(0xa000, 0xa007) AM_READNOP AM_WRITE(digdug_PORT_w)      /* video latches (spurious reads when setting latch bits) */
  984      AM_RANGE(0xb800, 0xb83f) AM_DEVREADWRITE("earom", atari_vg_earom_device, read, write)   /* non volatile memory data */
  985      AM_RANGE(0xb840, 0xb840) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)                    /* non volatile memory control */
  986  ADDRESS_MAP_END
  987  
  988  
  989  
  990  /* bootleg 4th CPU replacing the 5xXX chips */
  991  static ADDRESS_MAP_START( galaga_mem4, AS_PROGRAM, 8, galaga_state )
  992      AM_RANGE(0x0000, 0x0fff) AM_ROM
  993      AM_RANGE(0x1000, 0x107f) AM_RAM
  994  ADDRESS_MAP_END
  995  
  996  static ADDRESS_MAP_START( battles_mem4, AS_PROGRAM, 8, xevious_state )
  997      AM_RANGE(0x0000, 0x0fff) AM_ROM
  998      AM_RANGE(0x4000, 0x4003) AM_READ(battles_input_port_r)
  999      AM_RANGE(0x4001, 0x4001) AM_WRITE(battles_CPU4_coin_w)
 1000      AM_RANGE(0x5000, 0x5000) AM_WRITE(battles_noise_sound_w)
 1001      AM_RANGE(0x6000, 0x6000) AM_READWRITE(battles_customio3_r, battles_customio3_w)
 1002      AM_RANGE(0x7000, 0x7000) AM_READWRITE(battles_customio_data3_r, battles_customio_data3_w)
 1003      AM_RANGE(0x8000, 0x80ff) AM_RAM
 1004  ADDRESS_MAP_END
 1005  
 1006  static ADDRESS_MAP_START( dzigzag_mem4, AS_PROGRAM, 8, galaga_state )
 1007      AM_RANGE(0x0000, 0x0fff) AM_ROM
 1008      AM_RANGE(0x1000, 0x107f) AM_RAM
 1009      AM_RANGE(0x4000, 0x4007) AM_READONLY    // dip switches? bits 0 & 1 used
 1010  ADDRESS_MAP_END
 1011  
 1012  
 1013  static INPUT_PORTS_START( bosco )
 1014      PORT_START("IN0L")
 1015      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
 1016      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
 1017      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
 1018      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
 1019  
 1020      PORT_START("IN0H")
 1021      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
 1022      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
 1023      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
 1024      PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
 1025  
 1026      PORT_START("IN1L")
 1027      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
 1028      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
 1029      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
 1030      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
 1031  
 1032      PORT_START("IN1H")
 1033      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
 1034      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
 1035      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
 1036      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
 1037  
 1038      PORT_START("DSWA")
 1039      PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:1,2")
 1040      PORT_DIPSETTING(    0x01, DEF_STR( Easy ) )
 1041      PORT_DIPSETTING(    0x03, DEF_STR( Medium ) )
 1042      PORT_DIPSETTING(    0x02, DEF_STR( Hardest ) )
 1043      PORT_DIPSETTING(    0x00, "Auto" )
 1044      PORT_DIPNAME( 0x04, 0x04, DEF_STR( Allow_Continue ) )   PORT_DIPLOCATION("SWB:3")
 1045      PORT_DIPSETTING(    0x00, DEF_STR( No ) )
 1046      PORT_DIPSETTING(    0x04, DEF_STR( Yes ) ) // factory default = "Yes"
 1047      PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )      PORT_DIPLOCATION("SWB:4")
 1048      PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
 1049      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1050      PORT_DIPNAME( 0x10, 0x10, "Freeze" )                    PORT_DIPLOCATION("SWB:5")
 1051      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1052      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1053      PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SWB:6" ) /* Listed as "Unused" */
 1054      PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SWB:7" ) /* Listed as "Unused" */
 1055      PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )          PORT_DIPLOCATION("SWB:8")
 1056      PORT_DIPSETTING(    0x80, DEF_STR( Upright ) )
 1057      PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
 1058  
 1059      PORT_START("DSWB")
 1060      PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SWA:1,2,3")
 1061      PORT_DIPSETTING(    0x01, DEF_STR( 4C_1C ) )
 1062      PORT_DIPSETTING(    0x02, DEF_STR( 3C_1C ) )
 1063      PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ) )
 1064      PORT_DIPSETTING(    0x07, DEF_STR( 1C_1C ) )
 1065      PORT_DIPSETTING(    0x04, DEF_STR( 2C_3C ) )
 1066      PORT_DIPSETTING(    0x06, DEF_STR( 1C_2C ) )
 1067      PORT_DIPSETTING(    0x05, DEF_STR( 1C_3C ) )
 1068      PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
 1069      /* bonus scores are different for 5 lives */
 1070      PORT_DIPNAME( 0x38, 0x20, "Bonus Fighter" )         PORT_DIPLOCATION("SWA:4,5,6")
 1071      PORT_DIPSETTING(    0x30, "15K and 50K Only" )      PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0) /* Began with 1, 2 or 3 fighters */
 1072      PORT_DIPSETTING(    0x38, "20K and 70K Only" )      PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1073      PORT_DIPSETTING(    0x08, "10K, 50K, Every 50K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1074      PORT_DIPSETTING(    0x10, "15K, 50K, Every 50K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1075      PORT_DIPSETTING(    0x18, "15K, 70K, Every 70K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1076      PORT_DIPSETTING(    0x20, "20K, 70K, Every 70K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0) // factory default = "20K, 70K, Every70K"
 1077      PORT_DIPSETTING(    0x28, "30K, 100K, Every 100K" ) PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1078      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1079      PORT_DIPSETTING(    0x30, "30K, 100K, Every 100K" ) PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0) /* Began with 5 fighters */
 1080      PORT_DIPSETTING(    0x38, "30K, 120K, Every 120K" ) PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1081      PORT_DIPSETTING(    0x08, "15K and 70K Only" )      PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1082      PORT_DIPSETTING(    0x10, "20K and 70K Only" )      PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1083      PORT_DIPSETTING(    0x18, "20K and 100K Only" )     PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1084      PORT_DIPSETTING(    0x20, "30K and 120K Only" )     PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1085      PORT_DIPSETTING(    0x28, "30K, 80K, Every 80K" )   PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1086      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1087      PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Lives ) )        PORT_DIPLOCATION("SWA:7,8")
 1088      PORT_DIPSETTING(    0x00, "1" )
 1089      PORT_DIPSETTING(    0x40, "2" )
 1090      PORT_DIPSETTING(    0x80, "3" ) // factory default = "3"
 1091      PORT_DIPSETTING(    0xc0, "5" )
 1092  INPUT_PORTS_END
 1093  
 1094  static INPUT_PORTS_START( boscomd )
 1095      PORT_INCLUDE( bosco )
 1096  
 1097      PORT_MODIFY("DSWA")
 1098      PORT_DIPNAME( 0x01, 0x01, "2 Credits Game" )            PORT_DIPLOCATION("SWB:1")
 1099      PORT_DIPSETTING(    0x00, "1 Player" )
 1100      PORT_DIPSETTING(    0x01, "2 Players" )
 1101      PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:2,3")
 1102      PORT_DIPSETTING(    0x02, DEF_STR( Easy ) )
 1103      PORT_DIPSETTING(    0x06, DEF_STR( Medium ) )
 1104      PORT_DIPSETTING(    0x04, DEF_STR( Hardest ) )
 1105      PORT_DIPSETTING(    0x00, "Auto" )
 1106      PORT_DIPNAME( 0x08, 0x08, DEF_STR( Allow_Continue ) )   PORT_DIPLOCATION("SWB:4")
 1107      PORT_DIPSETTING(    0x00, DEF_STR( No ) )
 1108      PORT_DIPSETTING(    0x08, DEF_STR( Yes ) )
 1109      PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )      PORT_DIPLOCATION("SWB:5")
 1110      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1111      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1112      PORT_DIPNAME( 0x20, 0x20, "Freeze" )                    PORT_DIPLOCATION("SWB:6")
 1113      PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 1114      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1115  INPUT_PORTS_END
 1116  
 1117  
 1118  static INPUT_PORTS_START( galaga )
 1119      PORT_START("IN0L")
 1120      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
 1121      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
 1122      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
 1123      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
 1124  
 1125      PORT_START("IN0H")
 1126      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
 1127      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
 1128      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
 1129      PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
 1130  
 1131      PORT_START("IN1L")
 1132      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
 1133      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
 1134      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
 1135      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
 1136  
 1137      PORT_START("IN1H")
 1138      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
 1139      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
 1140      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
 1141      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
 1142  
 1143      PORT_START("DSWA")
 1144      PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SWB:1,2")
 1145      PORT_DIPSETTING(    0x03, DEF_STR( Easy ) )
 1146      PORT_DIPSETTING(    0x00, DEF_STR( Medium ) )
 1147      PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
 1148      PORT_DIPSETTING(    0x02, DEF_STR( Hardest ) )
 1149      PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SWB:3" ) /* Listed as "Unused" */
 1150      PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )  PORT_DIPLOCATION("SWB:4")
 1151      PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
 1152      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1153      PORT_DIPNAME( 0x10, 0x10, "Freeze" )                PORT_DIPLOCATION("SWB:5")
 1154      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1155      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1156      PORT_DIPNAME( 0x20, 0x20, "Rack Test" )             PORT_DIPLOCATION("SWB:6")
 1157      PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 1158      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1159      PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SWB:7" ) /* Listed as "Unused" */
 1160      PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )      PORT_DIPLOCATION("SWB:8")
 1161      PORT_DIPSETTING(    0x80, DEF_STR( Upright ) )
 1162      PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
 1163  
 1164      PORT_START("DSWB")
 1165      PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SWA:1,2,3")
 1166      PORT_DIPSETTING(    0x04, DEF_STR( 4C_1C ) )
 1167      PORT_DIPSETTING(    0x02, DEF_STR( 3C_1C ) )
 1168      PORT_DIPSETTING(    0x06, DEF_STR( 2C_1C ) )
 1169      PORT_DIPSETTING(    0x07, DEF_STR( 1C_1C ) )
 1170      PORT_DIPSETTING(    0x01, DEF_STR( 2C_3C ) )
 1171      PORT_DIPSETTING(    0x03, DEF_STR( 1C_2C ) )
 1172      PORT_DIPSETTING(    0x05, DEF_STR( 1C_3C ) )
 1173      PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
 1174      PORT_DIPNAME( 0x38, 0x10, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SWA:4,5,6")
 1175      PORT_DIPSETTING(    0x20, "20K, 60K, Every 60K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0) /* Began with 2, 3 or 4 fighters */
 1176      PORT_DIPSETTING(    0x18, "20K and 60K Only" )      PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1177      PORT_DIPSETTING(    0x10, "20K, 70K, Every 70K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0) // factory default = "20K, 70K, Every70K"
 1178      PORT_DIPSETTING(    0x30, "20K, 80K, Every 80K" )   PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1179      PORT_DIPSETTING(    0x38, "30K and 80K Only" )      PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1180      PORT_DIPSETTING(    0x08, "30K, 100K, Every 100K" ) PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1181      PORT_DIPSETTING(    0x28, "30K, 120K, Every 120K" ) PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1182      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWB",0xc0,NOTEQUALS,0xc0)
 1183      PORT_DIPSETTING(    0x20, "30K, 100K, Every 100K" ) PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0) /* Began with 5 fighters */
 1184      PORT_DIPSETTING(    0x18, "30K and 150K Only" )     PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1185      PORT_DIPSETTING(    0x10, "30K, 120K, Every 120K" ) PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1186      PORT_DIPSETTING(    0x30, "30K, 150K, Every 150K" ) PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1187      PORT_DIPSETTING(    0x38, "30K Only" )              PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1188      PORT_DIPSETTING(    0x08, "30K and 100K Only" )     PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1189      PORT_DIPSETTING(    0x28, "30K and 120K Only" )     PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1190      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWB",0xc0,EQUALS,0xc0)
 1191      PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Lives ) )        PORT_DIPLOCATION("SWA:7,8")
 1192      PORT_DIPSETTING(    0x00, "2" )
 1193      PORT_DIPSETTING(    0x80, "3" ) // factory default = "3"
 1194      PORT_DIPSETTING(    0x40, "4" )
 1195      PORT_DIPSETTING(    0xc0, "5" )
 1196  INPUT_PORTS_END
 1197  
 1198  static INPUT_PORTS_START( galagamw )
 1199      PORT_INCLUDE( galaga )
 1200  
 1201      PORT_MODIFY("DSWA")
 1202      PORT_DIPNAME( 0x01, 0x01, "2 Credits Game" )        PORT_DIPLOCATION("SWB:1")
 1203      PORT_DIPSETTING(    0x00, "1 Player" )
 1204      PORT_DIPSETTING(    0x01, "2 Players" )
 1205      PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SWB:2,3")
 1206      PORT_DIPSETTING(    0x06, DEF_STR( Easy ) )
 1207      PORT_DIPSETTING(    0x00, DEF_STR( Medium ) )
 1208      PORT_DIPSETTING(    0x02, DEF_STR( Hard ) )
 1209      PORT_DIPSETTING(    0x04, DEF_STR( Hardest ) )
 1210  INPUT_PORTS_END
 1211  
 1212  /* the same as galaga but with vertical movement */
 1213  static INPUT_PORTS_START( gatsbee )
 1214      PORT_INCLUDE( galaga )
 1215  
 1216      PORT_MODIFY("IN1L")
 1217      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
 1218      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
 1219      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
 1220      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
 1221  
 1222      PORT_MODIFY("IN1H")
 1223      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_COCKTAIL
 1224      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
 1225      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_COCKTAIL
 1226      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_COCKTAIL
 1227  INPUT_PORTS_END
 1228  
 1229  
 1230  static INPUT_PORTS_START( xevious )
 1231      PORT_START("IN0L")
 1232      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
 1233      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
 1234      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
 1235      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
 1236  
 1237      PORT_START("IN0H")
 1238      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
 1239      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
 1240      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
 1241      PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
 1242  
 1243      PORT_START("IN1L")
 1244      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
 1245      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
 1246      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
 1247      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
 1248  
 1249      PORT_START("IN1H")
 1250      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
 1251      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
 1252      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
 1253      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
 1254  
 1255      PORT_START("DSWA")
 1256      PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )       PORT_DIPLOCATION("SWA:1,2")
 1257      PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
 1258      PORT_DIPSETTING(    0x03, DEF_STR( 1C_1C ) )
 1259      PORT_DIPSETTING(    0x00, DEF_STR( 2C_3C ) )
 1260      PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
 1261      PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SWA:3,4,5")
 1262      PORT_DIPSETTING(    0x18, "10K, 40K, Every 40K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1263      PORT_DIPSETTING(    0x14, "10K, 50K, Every 50K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1264      PORT_DIPSETTING(    0x10, "20K, 50K, Every 50K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1265      PORT_DIPSETTING(    0x1c, "20K, 60K, Every 60K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00) // factory default = "20K, 60K, Every60K"
 1266      PORT_DIPSETTING(    0x0c, "20K, 70K, Every 70K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1267      PORT_DIPSETTING(    0x08, "20K, 80K, Every 80K" )   PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1268      PORT_DIPSETTING(    0x04, "20K and 60K Only" )      PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1269      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWA",0x60,NOTEQUALS,0x00)
 1270      PORT_DIPSETTING(    0x18, "10K, 50K, Every 50K" )   PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1271      PORT_DIPSETTING(    0x14, "20K, 50K, Every 50K" )   PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1272      PORT_DIPSETTING(    0x10, "20K, 60K, Every 60K" )   PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1273      PORT_DIPSETTING(    0x1c, "20K, 70K, Every 70K" )   PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1274      PORT_DIPSETTING(    0x0c, "20K, 80K, Every 80K" )   PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1275      PORT_DIPSETTING(    0x08, "30K, 100K, Every 100K" ) PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1276      PORT_DIPSETTING(    0x04, "20K and 80K Only" )      PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1277      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWA",0x60,EQUALS,0x00)
 1278      PORT_DIPNAME( 0x60, 0x60, DEF_STR( Lives ) )        PORT_DIPLOCATION("SWA:6,7")
 1279      PORT_DIPSETTING(    0x40, "1" )
 1280      PORT_DIPSETTING(    0x20, "2" )
 1281      PORT_DIPSETTING(    0x60, "3" ) // factory default = "3"
 1282      PORT_DIPSETTING(    0x00, "5" )
 1283      PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )      PORT_DIPLOCATION("SWA:8")
 1284      PORT_DIPSETTING(    0x80, DEF_STR( Upright ) )
 1285      PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
 1286  
 1287      PORT_START("DSWB")
 1288      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
 1289      PORT_DIPNAME( 0x02, 0x02, "Flags Award Bonus Life" )    PORT_DIPLOCATION("SWB:2")
 1290      PORT_DIPSETTING(    0x00, DEF_STR( No ) )
 1291      PORT_DIPSETTING(    0x02, DEF_STR( Yes ) )
 1292      PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )           PORT_DIPLOCATION("SWB:3,4")
 1293      PORT_DIPSETTING(    0x04, DEF_STR( 2C_1C ) )
 1294      PORT_DIPSETTING(    0x0c, DEF_STR( 1C_1C ) )
 1295      PORT_DIPSETTING(    0x00, DEF_STR( 2C_3C ) )
 1296      PORT_DIPSETTING(    0x08, DEF_STR( 1C_2C ) )
 1297      PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
 1298      PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:6,7")
 1299      PORT_DIPSETTING(    0x40, DEF_STR( Easy ) )
 1300      PORT_DIPSETTING(    0x60, DEF_STR( Normal ) )
 1301      PORT_DIPSETTING(    0x20, DEF_STR( Hard ) )
 1302      PORT_DIPSETTING(    0x00, DEF_STR( Hardest ) )
 1303      PORT_DIPNAME( 0x80, 0x80, "Freeze" )                    PORT_DIPLOCATION("SWB:8")
 1304      PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 1305      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1306  INPUT_PORTS_END
 1307  
 1308  /* same as xevious but different "Coin B" Dip Switch and "Copyright" Dip Switch instead of "Freeze" */
 1309  static INPUT_PORTS_START( xeviousa )
 1310      PORT_INCLUDE( xevious )
 1311  
 1312      PORT_MODIFY("DSWB")
 1313      PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )   PORT_DIPLOCATION("SWB:3,4")
 1314      PORT_DIPSETTING(    0x0c, DEF_STR( 1C_1C ) )
 1315      PORT_DIPSETTING(    0x08, DEF_STR( 1C_2C ) )
 1316      PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
 1317      PORT_DIPSETTING(    0x00, DEF_STR( 1C_6C ) )
 1318      /* when switch is on Namco, high score names are 10 letters long */
 1319      PORT_DIPNAME( 0x80, 0x80, "Copyright" )         PORT_DIPLOCATION("SWB:8")
 1320      PORT_DIPSETTING(    0x00, "Namco" )
 1321      PORT_DIPSETTING(    0x80, "Atari/Namco" )
 1322  INPUT_PORTS_END
 1323  
 1324  /* same as xevious but "Copyright" Dip Switch instead of "Freeze" */
 1325  static INPUT_PORTS_START( xeviousb )
 1326      PORT_INCLUDE( xevious )
 1327  
 1328      PORT_MODIFY("DSWB")
 1329      /* when switch is on Namco, high score names are 10 letters long */
 1330      PORT_DIPNAME( 0x80, 0x80, "Copyright" )         PORT_DIPLOCATION("SWB:8")
 1331      PORT_DIPSETTING(    0x00, "Namco" )
 1332      PORT_DIPSETTING(    0x80, "Atari/Namco" )
 1333  INPUT_PORTS_END
 1334  
 1335  /* same as xevious but different "Coin B" Dip Switch and inverted "Freeze" Dip Switch */
 1336  static INPUT_PORTS_START( sxevious )
 1337      PORT_INCLUDE( xevious )
 1338  
 1339      PORT_MODIFY("DSWB")
 1340      PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )   PORT_DIPLOCATION("SWB:3,4")
 1341      PORT_DIPSETTING(    0x0c, DEF_STR( 1C_1C ) )
 1342      PORT_DIPSETTING(    0x08, DEF_STR( 1C_2C ) )
 1343      PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
 1344      PORT_DIPSETTING(    0x00, DEF_STR( 1C_6C ) )
 1345      PORT_DIPNAME( 0x80, 0x00, "Freeze" )            PORT_DIPLOCATION("SWB:8")
 1346      PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
 1347      PORT_DIPSETTING(    0x80, DEF_STR( On ) )
 1348  INPUT_PORTS_END
 1349  
 1350  
 1351  static INPUT_PORTS_START( digdug )
 1352      PORT_START("IN0L")
 1353      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
 1354      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
 1355      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
 1356      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
 1357  
 1358      PORT_START("IN0H")
 1359      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
 1360      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
 1361      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
 1362      PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
 1363  
 1364      PORT_START("IN1L")
 1365      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
 1366      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
 1367      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
 1368      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
 1369  
 1370      PORT_START("IN1H")
 1371      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
 1372      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
 1373      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
 1374      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
 1375  
 1376      PORT_START("DSWA")
 1377      PORT_DIPNAME( 0x07, 0x01, DEF_STR( Coin_B ) )       PORT_DIPLOCATION("SWA:1,2,3")
 1378      PORT_DIPSETTING(    0x07, DEF_STR( 3C_1C ) )
 1379      PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ) )
 1380      PORT_DIPSETTING(    0x01, DEF_STR( 1C_1C ) )
 1381      PORT_DIPSETTING(    0x05, DEF_STR( 2C_3C ) )
 1382      PORT_DIPSETTING(    0x06, DEF_STR( 1C_2C ) )
 1383      PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
 1384      PORT_DIPSETTING(    0x04, DEF_STR( 1C_6C ) )
 1385      PORT_DIPSETTING(    0x00, DEF_STR( 1C_7C ) )
 1386      PORT_DIPNAME( 0x38, 0x18, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SWA:4,5,6")
 1387      PORT_DIPSETTING(    0x20, "10K, 40K, Every 40K" )   PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0) // Atari factory default = "10K, 40K, Every40K"
 1388      PORT_DIPSETTING(    0x10, "10K, 50K, Every 50K" )   PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1389      PORT_DIPSETTING(    0x30, "20K, 60K, Every 60K" )   PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1390      PORT_DIPSETTING(    0x08, "20K, 70K, Every 70K" )   PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1391      PORT_DIPSETTING(    0x28, "10K and 40K Only" )      PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1392      PORT_DIPSETTING(    0x18, "20K and 60K Only" )      PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0) // Namco factory default = "20K, 60K"
 1393      PORT_DIPSETTING(    0x38, "10K Only" )              PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1394      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWA",0xc0,NOTEQUALS,0xc0)
 1395      PORT_DIPSETTING(    0x20, "20K, 60K, Every 60K" )   PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1396      PORT_DIPSETTING(    0x10, "30K, 80K, Every 80K" )   PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1397      PORT_DIPSETTING(    0x30, "20K and 50K Only" )      PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1398      PORT_DIPSETTING(    0x08, "20K and 60K Only" )      PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1399      PORT_DIPSETTING(    0x28, "30K and 70K Only" )      PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1400      PORT_DIPSETTING(    0x18, "20K Only" )              PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1401      PORT_DIPSETTING(    0x38, "30K Only" )              PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1402      PORT_DIPSETTING(    0x00, DEF_STR( None ) )         PORT_CONDITION("DSWA",0xc0,EQUALS,0xc0)
 1403      PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Lives ) )        PORT_DIPLOCATION("SWA:7,8")
 1404      PORT_DIPSETTING(    0x00, "1" )
 1405      PORT_DIPSETTING(    0x40, "2" )
 1406      PORT_DIPSETTING(    0x80, "3" ) // factory default = "3"
 1407      PORT_DIPSETTING(    0xc0, "5" )
 1408  
 1409      PORT_START("DSWA_HI")
 1410      PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, digdug_state,shifted_port_r, "DSWA")
 1411  
 1412      PORT_START("DSWB") // reverse order against SWA
 1413      PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_A ) )           PORT_DIPLOCATION("SWB:1,2")
 1414      PORT_DIPSETTING(    0x40, DEF_STR( 2C_1C ) )
 1415      PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
 1416      PORT_DIPSETTING(    0xc0, DEF_STR( 2C_3C ) )
 1417      PORT_DIPSETTING(    0x80, DEF_STR( 1C_2C ) )
 1418      PORT_DIPNAME( 0x20, 0x20, "Freeze" )                    PORT_DIPLOCATION("SWB:3")
 1419      PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 1420      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1421      PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )      PORT_DIPLOCATION("SWB:4")
 1422      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1423      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1424      PORT_DIPNAME( 0x08, 0x00, DEF_STR( Allow_Continue ) )   PORT_DIPLOCATION("SWB:5")
 1425      PORT_DIPSETTING(    0x08, DEF_STR( No ) ) // factory default = "No"
 1426      PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
 1427      PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )          PORT_DIPLOCATION("SWB:6")
 1428      PORT_DIPSETTING(    0x04, DEF_STR( Upright ) )
 1429      PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
 1430      PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:7,8")
 1431      PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
 1432      PORT_DIPSETTING(    0x02, DEF_STR( Medium ) )
 1433      PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
 1434      PORT_DIPSETTING(    0x03, DEF_STR( Hardest ) )
 1435  
 1436      PORT_START("DSWB_HI")
 1437      PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, digdug_state,shifted_port_r, "DSWB")
 1438  INPUT_PORTS_END
 1439  
 1440  /*
 1441  static INPUT_PORTS_START( digdugja ) // Namco older?
 1442      PORT_INCLUDE( digdug )
 1443  
 1444      PORT_MODIFY("DSWB") // same order as SWA
 1445      PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:2,1")
 1446      PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
 1447      PORT_DIPSETTING(    0x02, DEF_STR( Medium ) )
 1448      PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
 1449      PORT_DIPSETTING(    0x03, DEF_STR( Hardest ) )
 1450      PORT_DIPNAME( 0x04, 0x00, DEF_STR( Allow_Continue ) )   PORT_DIPLOCATION("SWB:3")
 1451      PORT_DIPSETTING(    0x04, DEF_STR( No ) ) // Namco factory default = "No"
 1452      PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
 1453      PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )      PORT_DIPLOCATION("SWB:4")
 1454      PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
 1455      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1456      PORT_DIPNAME( 0x10, 0x10, "Freeze" )                    PORT_DIPLOCATION("SWB:5")
 1457      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1458      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1459      PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )           PORT_DIPLOCATION("SWB:7,6")
 1460      PORT_DIPSETTING(    0x20, DEF_STR( 2C_1C ) )
 1461      PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
 1462      PORT_DIPSETTING(    0x60, DEF_STR( 2C_3C ) )
 1463      PORT_DIPSETTING(    0x40, DEF_STR( 1C_2C ) )
 1464      PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SWB:8" )
 1465  INPUT_PORTS_END
 1466  
 1467  static INPUT_PORTS_START( digdugus ) // Atari older?
 1468      PORT_INCLUDE( digdug )
 1469  
 1470      PORT_MODIFY("DSWB") // reverse order against SWA
 1471      PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_A ) )           PORT_DIPLOCATION("SWB:1,2")
 1472      PORT_DIPSETTING(    0x40, DEF_STR( 2C_1C ) )
 1473      PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
 1474      PORT_DIPSETTING(    0xc0, DEF_STR( 2C_3C ) )
 1475      PORT_DIPSETTING(    0x80, DEF_STR( 1C_2C ) )
 1476      PORT_DIPNAME( 0x20, 0x20, "Freeze" )                    PORT_DIPLOCATION("SWB:3")
 1477      PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 1478      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1479      PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )      PORT_DIPLOCATION("SWB:4")
 1480      PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 1481      PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 1482      PORT_DIPNAME( 0x08, 0x00, DEF_STR( Allow_Continue ) )   PORT_DIPLOCATION("SWB:5")
 1483      PORT_DIPSETTING(    0x08, DEF_STR( No ) )
 1484      PORT_DIPSETTING(    0x00, DEF_STR( Yes ) ) // Atari factory default = "Yes"
 1485      PORT_DIPNAME( 0x06, 0x00, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SWB:6,7")
 1486      PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
 1487      PORT_DIPSETTING(    0x04, DEF_STR( Medium ) )
 1488      PORT_DIPSETTING(    0x02, DEF_STR( Hard ) )
 1489      PORT_DIPSETTING(    0x06, DEF_STR( Hardest ) )
 1490      PORT_DIPNAME( 0x01, 0x01, "Number Of Coin Counter(s)" ) PORT_DIPLOCATION("SWB:8")
 1491      PORT_DIPSETTING(    0x01, "Two Coin Counters" )
 1492      PORT_DIPSETTING(    0x00, "One Coin Counter" )
 1493  INPUT_PORTS_END
 1494  */
 1495  
 1496  
 1497  
 1498  static const gfx_layout charlayout_2bpp =
 1499  {
 1500      8,8,
 1501      RGN_FRAC(1,1),
 1502      2,
 1503      { 0, 4 },
 1504      { STEP4(8*8,1), STEP4(0*8,1) },
 1505      { STEP8(0*8,8) },
 1506      16*8
 1507  };
 1508  
 1509  static const gfx_layout charlayout_xevious =
 1510  {
 1511      8,8,
 1512      RGN_FRAC(1,1),
 1513      1,
 1514      { 0 },
 1515      { STEP8(0,1) },
 1516      { STEP8(0,8) },
 1517      8*8
 1518  };
 1519  
 1520  static const gfx_layout charlayout_digdug =
 1521  {
 1522      8,8,
 1523      RGN_FRAC(1,1),
 1524      1,
 1525      { 0 },
 1526      { STEP8(7,-1) },
 1527      { STEP8(0,8) },
 1528      8*8
 1529  };
 1530  
 1531  static const gfx_layout bgcharlayout =
 1532  {
 1533      8,8,
 1534      RGN_FRAC(1,2),
 1535      2,
 1536      { 0, RGN_FRAC(1,2) },
 1537      { STEP8(0,1) },
 1538      { STEP8(0,8) },
 1539      8*8
 1540  };
 1541  
 1542  static const gfx_layout spritelayout_bosco =
 1543  {
 1544      16,16,
 1545      RGN_FRAC(1,1),
 1546      2,
 1547      { 0, 4 },
 1548      { STEP4(8*8,1), STEP4(16*8,1), STEP4(24*8,1), STEP4(0*8,1) },
 1549      { STEP8(0*8,8), STEP8(32*8,8) },
 1550      64*8
 1551  };
 1552  
 1553  static const gfx_layout spritelayout_galaga =
 1554  {
 1555      16,16,
 1556      RGN_FRAC(1,1),
 1557      2,
 1558      { 0, 4 },
 1559      { STEP4(0*8,1), STEP4(8*8,1), STEP4(16*8,1), STEP4(24*8,1) },
 1560      { STEP8(0*8,8), STEP8(32*8,8) },
 1561      64*8
 1562  };
 1563  
 1564  static const gfx_layout spritelayout_xevious =
 1565  {
 1566      16,16,
 1567      RGN_FRAC(1,2),
 1568      3,
 1569      { RGN_FRAC(1,2)+4, 0, 4 },
 1570      { STEP4(0*8,1), STEP4(8*8,1), STEP4(16*8,1), STEP4(24*8,1) },
 1571      { STEP8(0*8,8), STEP8(32*8,8) },
 1572      64*8
 1573  };
 1574  
 1575  static const gfx_layout dotlayout =
 1576  {
 1577      4,4,
 1578      8,
 1579      3,  /* 2 bits color + 1 bit transparency */
 1580      { 5, 6, 7 },
 1581      { STEP4(0,8) },
 1582      { STEP4(0,32) },
 1583      16*8
 1584  };
 1585  
 1586  static GFXDECODE_START( bosco )
 1587      GFXDECODE_ENTRY( "gfx1", 0, charlayout_2bpp,       0, 64 )
 1588      GFXDECODE_ENTRY( "gfx2", 0, spritelayout_bosco, 64*4, 64 )
 1589      GFXDECODE_ENTRY( "gfx3", 0, dotlayout,     64*4+64*4,  1 )
 1590  GFXDECODE_END
 1591  
 1592  static GFXDECODE_START( galaga )
 1593      GFXDECODE_ENTRY( "gfx1", 0, charlayout_2bpp,        0, 64 )
 1594      GFXDECODE_ENTRY( "gfx2", 0, spritelayout_galaga, 64*4, 64 )
 1595  GFXDECODE_END
 1596  
 1597  static GFXDECODE_START( xevious )
 1598      GFXDECODE_ENTRY( "gfx1", 0, charlayout_xevious, 128*4+64*8,  64 )
 1599      GFXDECODE_ENTRY( "gfx2", 0, bgcharlayout,                0, 128 )
 1600      GFXDECODE_ENTRY( "gfx3", 0, spritelayout_xevious,    128*4,  64 )
 1601  GFXDECODE_END
 1602  
 1603  static GFXDECODE_START( digdug )
 1604      GFXDECODE_ENTRY( "gfx1", 0, charlayout_digdug,         0, 16 )
 1605      GFXDECODE_ENTRY( "gfx2", 0, spritelayout_galaga,    16*2, 64 )
 1606      GFXDECODE_ENTRY( "gfx3", 0, charlayout_2bpp, 64*4 + 16*2, 64 )
 1607  GFXDECODE_END
 1608  
 1609  
 1610  /* The resistance path of the namco sound is 16k compared to
 1611   * the 10k of the highest gain 54xx filter. Giving a 10/16 gain.
 1612   */
 1613  static const namco_interface namco_config =
 1614  {
 1615      3,              /* number of voices */
 1616      0               /* stereo */
 1617  };
 1618  
 1619  static const char *const battles_sample_names[] =
 1620  {
 1621      "*battles",
 1622      "explo1",   /* ground target explosion */
 1623      "explo2",   /* Solvalou explosion */
 1624      0   /* end of array */
 1625  };
 1626  
 1627  static const samples_interface battles_samples_interface =
 1628  {
 1629      1,  /* one channel */
 1630      battles_sample_names
 1631  };
 1632  
 1633  
 1634  INTERRUPT_GEN_MEMBER(galaga_state::main_vblank_irq)
 1635  {
 1636      if(m_main_irq_mask)
 1637          device.execute().set_input_line(0, ASSERT_LINE);
 1638  }
 1639  
 1640  INTERRUPT_GEN_MEMBER(galaga_state::sub_vblank_irq)
 1641  {
 1642      if(m_sub_irq_mask)
 1643          device.execute().set_input_line(0, ASSERT_LINE);
 1644  }
 1645  
 1646  const namco_06xx_config bosco_namco_06xx_0_intf =
 1647  {
 1648      "maincpu", "51xx",   NULL,   "50xx_1", "54xx"
 1649  };
 1650  
 1651  const namco_06xx_config bosco_namco_06xx_1_intf =
 1652  {
 1653      "sub",     "50xx_2", "52xx", NULL,     NULL
 1654  };
 1655  
 1656  const namco_54xx_config namco_54xx_intf =
 1657  {
 1658      "discrete", NODE_01
 1659  };
 1660  
 1661  static MACHINE_CONFIG_START( bosco, bosco_state )
 1662  
 1663      /* basic machine hardware */
 1664      MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1665      MCFG_CPU_PROGRAM_MAP(bosco_map)
 1666      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  main_vblank_irq)
 1667  
 1668      MCFG_CPU_ADD("sub", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1669      MCFG_CPU_PROGRAM_MAP(bosco_map)
 1670      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  sub_vblank_irq)
 1671  
 1672      MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1673      MCFG_CPU_PROGRAM_MAP(bosco_map)
 1674  
 1675      MCFG_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/6/2) /* 1.536 MHz */
 1676      MCFG_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/6/2) /* 1.536 MHz */
 1677      MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf)      /* 1.536 MHz */
 1678      MCFG_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/6/2, namco_52xx_intf)      /* 1.536 MHz */
 1679      MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf)      /* 1.536 MHz */
 1680  
 1681      MCFG_NAMCO_06XX_ADD("06xx_0", MASTER_CLOCK/6/64, bosco_namco_06xx_0_intf)
 1682      MCFG_NAMCO_06XX_ADD("06xx_1", MASTER_CLOCK/6/64, bosco_namco_06xx_1_intf)
 1683  
 1684      MCFG_WATCHDOG_VBLANK_INIT(8)
 1685      MCFG_QUANTUM_TIME(attotime::from_hz(6000))  /* 100 CPU slices per frame - an high value to ensure proper */
 1686                              /* synchronization of the CPUs */
 1687      MCFG_MACHINE_START_OVERRIDE(bosco_state,galaga)
 1688      MCFG_MACHINE_RESET_OVERRIDE(bosco_state,galaga)
 1689  
 1690      /* video hardware */
 1691      MCFG_SCREEN_ADD("screen", RASTER)
 1692      MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 16, 224+16)
 1693      MCFG_SCREEN_UPDATE_DRIVER(bosco_state, screen_update_bosco)
 1694      MCFG_SCREEN_VBLANK_DRIVER(bosco_state, screen_eof_bosco)
 1695  
 1696      MCFG_GFXDECODE(bosco)
 1697      MCFG_PALETTE_LENGTH(64*4+64*4+4+64)
 1698  
 1699      MCFG_PALETTE_INIT_OVERRIDE(bosco_state,bosco)
 1700      MCFG_VIDEO_START_OVERRIDE(bosco_state,bosco)
 1701  
 1702      /* sound hardware */
 1703      MCFG_SPEAKER_STANDARD_MONO("mono")
 1704  
 1705      MCFG_SOUND_ADD("namco", NAMCO, MASTER_CLOCK/6/32)
 1706      MCFG_SOUND_CONFIG(namco_config)
 1707      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90 * 10.0 / 16.0)
 1708  
 1709      /* discrete circuit on the 54XX outputs */
 1710      MCFG_SOUND_ADD("discrete", DISCRETE, 0)
 1711      MCFG_SOUND_CONFIG_DISCRETE(bosco)
 1712      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
 1713  MACHINE_CONFIG_END
 1714  
 1715  
 1716  const namco_06xx_config galaga_namco_06xx_intf =
 1717  {
 1718      "maincpu", "51xx", NULL, NULL, "54xx"
 1719  };
 1720  
 1721  static MACHINE_CONFIG_START( galaga, galaga_state )
 1722  
 1723      /* basic machine hardware */
 1724      MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1725      MCFG_CPU_PROGRAM_MAP(galaga_map)
 1726      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  main_vblank_irq)
 1727  
 1728      MCFG_CPU_ADD("sub", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1729      MCFG_CPU_PROGRAM_MAP(galaga_map)
 1730      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  sub_vblank_irq)
 1731  
 1732      MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1733      MCFG_CPU_PROGRAM_MAP(galaga_map)
 1734  
 1735      MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf)      /* 1.536 MHz */
 1736      MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf)      /* 1.536 MHz */
 1737  
 1738      MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64,  galaga_namco_06xx_intf)
 1739  
 1740      MCFG_WATCHDOG_VBLANK_INIT(8)
 1741      MCFG_QUANTUM_TIME(attotime::from_hz(6000))  /* 100 CPU slices per frame - an high value to ensure proper */
 1742                              /* synchronization of the CPUs */
 1743      MCFG_MACHINE_START_OVERRIDE(galaga_state,galaga)
 1744      MCFG_MACHINE_RESET_OVERRIDE(galaga_state,galaga)
 1745  
 1746      /* video hardware */
 1747      MCFG_SCREEN_ADD("screen", RASTER)
 1748      MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
 1749      MCFG_SCREEN_UPDATE_DRIVER(galaga_state, screen_update_galaga)
 1750      MCFG_SCREEN_VBLANK_DRIVER(galaga_state, screen_eof_galaga)
 1751  
 1752      MCFG_GFXDECODE(galaga)
 1753      MCFG_PALETTE_LENGTH(64*4+64*4+64)
 1754  
 1755      MCFG_PALETTE_INIT_OVERRIDE(galaga_state,galaga)
 1756      MCFG_VIDEO_START_OVERRIDE(galaga_state,galaga)
 1757  
 1758      /* sound hardware */
 1759      MCFG_SPEAKER_STANDARD_MONO("mono")
 1760  
 1761      MCFG_SOUND_ADD("namco", NAMCO, MASTER_CLOCK/6/32)
 1762      MCFG_SOUND_CONFIG(namco_config)
 1763      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90 * 10.0 / 16.0)
 1764  
 1765      /* discrete circuit on the 54XX outputs */
 1766      MCFG_SOUND_ADD("discrete", DISCRETE, 0)
 1767      MCFG_SOUND_CONFIG_DISCRETE(galaga)
 1768      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
 1769  MACHINE_CONFIG_END
 1770  
 1771  const namco_06xx_config galagab_namco_06xx_intf =
 1772  {
 1773      "maincpu", "51xx", NULL, NULL, NULL
 1774  };
 1775  
 1776  static MACHINE_CONFIG_DERIVED( galagab, galaga )
 1777  
 1778      /* basic machine hardware */
 1779  
 1780      MCFG_DEVICE_REMOVE("54xx")
 1781      MCFG_DEVICE_REMOVE("06xx")
 1782  
 1783      /* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
 1784      MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, galagab_namco_06xx_intf)
 1785  
 1786      MCFG_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1787      MCFG_CPU_PROGRAM_MAP(galaga_mem4)
 1788  
 1789      /* sound hardware */
 1790      MCFG_DEVICE_REMOVE("discrete")
 1791  MACHINE_CONFIG_END
 1792  
 1793  const namco_06xx_config xevious_namco_06xx_intf =
 1794  {
 1795      "maincpu", "51xx", NULL, "50xx", "54xx"
 1796  };
 1797  
 1798  static MACHINE_CONFIG_START( xevious, xevious_state )
 1799  
 1800      /* basic machine hardware */
 1801      MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1802      MCFG_CPU_PROGRAM_MAP(xevious_map)
 1803      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  main_vblank_irq)
 1804  
 1805      MCFG_CPU_ADD("sub", Z80,MASTER_CLOCK/6) /* 3.072 MHz */
 1806      MCFG_CPU_PROGRAM_MAP(xevious_map)
 1807      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  sub_vblank_irq)
 1808  
 1809      MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1810      MCFG_CPU_PROGRAM_MAP(xevious_map)
 1811  
 1812      MCFG_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/6/2)   /* 1.536 MHz */
 1813      MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf)      /* 1.536 MHz */
 1814      MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf)      /* 1.536 MHz */
 1815  
 1816      MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, xevious_namco_06xx_intf)
 1817  
 1818      MCFG_WATCHDOG_VBLANK_INIT(8)
 1819      MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* 1000 CPU slices per frame - an high value to ensure proper */
 1820                              /* synchronization of the CPUs */
 1821      MCFG_MACHINE_START_OVERRIDE(galaga_state,galaga)
 1822      MCFG_MACHINE_RESET_OVERRIDE(galaga_state,galaga)
 1823  
 1824      /* video hardware */
 1825      MCFG_SCREEN_ADD("screen", RASTER)
 1826      MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
 1827      MCFG_SCREEN_UPDATE_DRIVER(xevious_state, screen_update_xevious)
 1828  
 1829      MCFG_GFXDECODE(xevious)
 1830      MCFG_PALETTE_LENGTH(128*4+64*8+64*2)
 1831  
 1832      MCFG_PALETTE_INIT_OVERRIDE(xevious_state,xevious)
 1833      MCFG_VIDEO_START_OVERRIDE(xevious_state,xevious)
 1834  
 1835      /* sound hardware */
 1836      MCFG_SPEAKER_STANDARD_MONO("mono")
 1837  
 1838      MCFG_SOUND_ADD("namco", NAMCO, MASTER_CLOCK/6/32)
 1839      MCFG_SOUND_CONFIG(namco_config)
 1840      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90 * 10.0 / 16.0)
 1841  
 1842      /* discrete circuit on the 54XX outputs */
 1843      MCFG_SOUND_ADD("discrete", DISCRETE, 0)
 1844      MCFG_SOUND_CONFIG_DISCRETE(galaga)
 1845      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
 1846  MACHINE_CONFIG_END
 1847  
 1848  const namco_06xx_config battles_namco_06xx_intf =
 1849  {
 1850      "maincpu", "51xx", NULL, NULL, NULL
 1851  };
 1852  
 1853  static MACHINE_CONFIG_DERIVED( battles, xevious )
 1854  
 1855      /* basic machine hardware */
 1856  
 1857      MCFG_DEVICE_REMOVE("50xx")
 1858      MCFG_DEVICE_REMOVE("54xx")
 1859      MCFG_DEVICE_REMOVE("06xx")
 1860  
 1861      /* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
 1862      MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, battles_namco_06xx_intf)
 1863  
 1864      MCFG_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1865      MCFG_CPU_PROGRAM_MAP(battles_mem4)
 1866      MCFG_CPU_VBLANK_INT_DRIVER("screen", xevious_state, battles_interrupt_4)
 1867  
 1868      MCFG_TIMER_DRIVER_ADD("battles_nmi", xevious_state, battles_nmi_generate)
 1869  
 1870      MCFG_MACHINE_RESET_OVERRIDE(xevious_state,battles)
 1871  
 1872      /* video hardware */
 1873      MCFG_PALETTE_INIT_OVERRIDE(xevious_state,battles)
 1874  
 1875      /* sound hardware */
 1876      MCFG_DEVICE_REMOVE("discrete")
 1877  
 1878      MCFG_SAMPLES_ADD("samples", battles_samples_interface)
 1879      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
 1880  MACHINE_CONFIG_END
 1881  
 1882  const namco_06xx_config digdug_namco_06xx_intf =
 1883  {
 1884      "maincpu", "51xx", "53xx", NULL, NULL
 1885  };
 1886  
 1887  static MACHINE_CONFIG_START( digdug, digdug_state )
 1888  
 1889      /* basic machine hardware */
 1890      MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1891      MCFG_CPU_PROGRAM_MAP(digdug_map)
 1892      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  main_vblank_irq)
 1893  
 1894      MCFG_CPU_ADD("sub", Z80, MASTER_CLOCK/6)    /* 3.072 MHz */
 1895      MCFG_CPU_PROGRAM_MAP(digdug_map)
 1896      MCFG_CPU_VBLANK_INT_DRIVER("screen", galaga_state,  sub_vblank_irq)
 1897  
 1898      MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1899      MCFG_CPU_PROGRAM_MAP(digdug_map)
 1900  
 1901      MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf)      /* 1.536 MHz */
 1902      MCFG_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/6/2, namco_53xx_intf)      /* 1.536 MHz */
 1903  
 1904      MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, digdug_namco_06xx_intf)
 1905  
 1906      MCFG_QUANTUM_TIME(attotime::from_hz(6000))  /* 100 CPU slices per frame - an high value to ensure proper */
 1907                              /* synchronization of the CPUs */
 1908      MCFG_MACHINE_START_OVERRIDE(galaga_state,galaga)
 1909      MCFG_MACHINE_RESET_OVERRIDE(galaga_state,galaga)
 1910  
 1911      MCFG_ATARIVGEAROM_ADD("earom")
 1912  
 1913      /* video hardware */
 1914      MCFG_SCREEN_ADD("screen", RASTER)
 1915      MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 288, 264, 0, 224)
 1916      MCFG_SCREEN_UPDATE_DRIVER(digdug_state, screen_update_digdug)
 1917  
 1918      MCFG_GFXDECODE(digdug)
 1919      MCFG_PALETTE_LENGTH(16*2+64*4+64*4)
 1920  
 1921      MCFG_PALETTE_INIT_OVERRIDE(digdug_state,digdug)
 1922      MCFG_VIDEO_START_OVERRIDE(digdug_state,digdug)
 1923  
 1924      /* sound hardware */
 1925      MCFG_SPEAKER_STANDARD_MONO("mono")
 1926  
 1927      MCFG_SOUND_ADD("namco", NAMCO, MASTER_CLOCK/6/32)
 1928      MCFG_SOUND_CONFIG(namco_config)
 1929      MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90 * 10.0 / 16.0)
 1930  MACHINE_CONFIG_END
 1931  
 1932  static MACHINE_CONFIG_DERIVED( dzigzag, digdug )
 1933  
 1934      /* basic machine hardware */
 1935  
 1936      MCFG_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
 1937      MCFG_CPU_PROGRAM_MAP(dzigzag_mem4)
 1938  MACHINE_CONFIG_END
 1939  
 1940  
 1941  
 1942  /***************************************************************************
 1943  
 1944    Game driver(s)
 1945  
 1946  ***************************************************************************/
 1947  
 1948  /**********************************************************************************************
 1949    Bosconian & clones
 1950  **********************************************************************************************/
 1951  /*
 1952  
 1953  Bosconian
 1954  Namco/Midway, 1981
 1955  
 1956  */
 1957  
 1958  ROM_START( bosco )
 1959      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 1960      ROM_LOAD( "bos3_1.3n",    0x0000, 0x1000, CRC(96021267) SHA1(bd49b0caabcccf9df45a272d767456a4fc8a7c07) )
 1961      ROM_LOAD( "bos1_2.3m",    0x1000, 0x1000, CRC(2d8f3ebe) SHA1(75de1cba7531ae4bf7fbbef7b8e37b9fec4ed0d0) )
 1962      ROM_LOAD( "bos1_3.3l",    0x2000, 0x1000, CRC(c80ccfa5) SHA1(f2bbec2ea9846d4601f06c0b4242744447a88fda) )
 1963      ROM_LOAD( "bos1_4b.3k",   0x3000, 0x1000, CRC(a3f7f4ab) SHA1(eb26184311bae0767c7a5593926e6eadcbcb680e) )
 1964  
 1965      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 1966      ROM_LOAD( "bos1_5c.3j",   0x0000, 0x1000, CRC(a7c8e432) SHA1(3607be75daa10f1f98dbfd9e600c5ba513130d44) )
 1967      ROM_LOAD( "bos3_6.3h",    0x1000, 0x1000, CRC(4543cf82) SHA1(50ad7d1ab6694eb8fab88d0fa79ee04f6984f3ca) )
 1968  
 1969      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 1970      ROM_LOAD( "bos1_7.3e",    0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
 1971  
 1972      ROM_REGION( 0x1000, "gfx1", 0 )
 1973      ROM_LOAD( "bos1_14.5d",   0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
 1974  
 1975      ROM_REGION( 0x1000, "gfx2", 0 )
 1976      ROM_LOAD( "bos1_13.5e",   0x0000, 0x1000, CRC(e869219c) SHA1(425614cd0642743a82ef9c1aada29774a92203ea) )
 1977  
 1978      ROM_REGION( 0x0100, "gfx3", 0 )
 1979      ROM_LOAD( "bos1-4.2r",    0x0000, 0x0100, CRC(9b69b543) SHA1(47af3f67e50794e839b74fe61197af2228084efd) )    /* dots */
 1980  
 1981      ROM_REGION( 0x0260, "proms", 0 )
 1982      ROM_LOAD( "bos1-6.6b",    0x0000, 0x0020, CRC(d2b96fb0) SHA1(54c100ec9d173d7dd48a453ebed5f625053cb6e0) )    /* palette */
 1983      ROM_LOAD( "bos1-5.4m",    0x0020, 0x0100, CRC(4e15d59c) SHA1(3542ead6421d169c3569e121ec2be304e108787c) )    /* lookup table */
 1984      ROM_LOAD( "bos1-3.2d",    0x0120, 0x0020, CRC(b88d5ba9) SHA1(7b97a38a540b7ca4b7d9ae338ec38b9b1a337846) )    /* video layout (not used) */
 1985      ROM_LOAD( "bos1-7.7h",    0x0140, 0x0020, CRC(87d61353) SHA1(c7493e52662c921625676a4a4e8cf4371bd938b7) )    /* video timing (not used) */
 1986  
 1987      ROM_REGION( 0x0200, "namco", 0 )
 1988      ROM_LOAD( "bos1-1.1d",    0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
 1989      ROM_LOAD( "bos1-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 1990  
 1991      ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
 1992      ROM_LOAD( "bos1_9.5n",    0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
 1993      ROM_LOAD( "bos1_10.5m",   0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
 1994      ROM_LOAD( "bos1_11.5k",   0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
 1995  ROM_END
 1996  
 1997  ROM_START( boscoo )
 1998      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 1999      ROM_LOAD( "bos1_1.3n",    0x0000, 0x1000, CRC(0d9920e7) SHA1(e7633233f603ccb5b7a970ed5b58ef361ef2c94e) )
 2000      ROM_LOAD( "bos1_2.3m",    0x1000, 0x1000, CRC(2d8f3ebe) SHA1(75de1cba7531ae4bf7fbbef7b8e37b9fec4ed0d0) )
 2001      ROM_LOAD( "bos1_3.3l",    0x2000, 0x1000, CRC(c80ccfa5) SHA1(f2bbec2ea9846d4601f06c0b4242744447a88fda) )
 2002      ROM_LOAD( "bos1_4b.3k",   0x3000, 0x1000, CRC(a3f7f4ab) SHA1(eb26184311bae0767c7a5593926e6eadcbcb680e) )
 2003  
 2004      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2005      ROM_LOAD( "bos1_5c.3j",   0x0000, 0x1000, CRC(a7c8e432) SHA1(3607be75daa10f1f98dbfd9e600c5ba513130d44) )
 2006      ROM_LOAD( "bos1_6.3h",    0x1000, 0x1000, CRC(31b8c648) SHA1(de0db24d385d2361ec989bf32388df8202ad535c) )
 2007  
 2008      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 2009      ROM_LOAD( "bos1_7.3e",    0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
 2010  
 2011      ROM_REGION( 0x1000, "gfx1", 0 )
 2012      ROM_LOAD( "bos1_14.5d",   0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
 2013  
 2014      ROM_REGION( 0x1000, "gfx2", 0 )
 2015      ROM_LOAD( "bos1_13.5e",   0x0000, 0x1000, CRC(e869219c) SHA1(425614cd0642743a82ef9c1aada29774a92203ea) )
 2016  
 2017      ROM_REGION( 0x0100, "gfx3", 0 )
 2018      ROM_LOAD( "bos1-4.2r",    0x0000, 0x0100, CRC(9b69b543) SHA1(47af3f67e50794e839b74fe61197af2228084efd) )    /* dots */
 2019  
 2020      ROM_REGION( 0x0260, "proms", 0 )
 2021      ROM_LOAD( "bos1-6.6b",    0x0000, 0x0020, CRC(d2b96fb0) SHA1(54c100ec9d173d7dd48a453ebed5f625053cb6e0) )    /* palette */
 2022      ROM_LOAD( "bos1-5.4m",    0x0020, 0x0100, CRC(4e15d59c) SHA1(3542ead6421d169c3569e121ec2be304e108787c) )    /* lookup table */
 2023      ROM_LOAD( "bos1-3.2d",    0x0120, 0x0020, CRC(b88d5ba9) SHA1(7b97a38a540b7ca4b7d9ae338ec38b9b1a337846) )    /* video layout (not used) */
 2024      ROM_LOAD( "bos1-7.7h",    0x0140, 0x0020, CRC(87d61353) SHA1(c7493e52662c921625676a4a4e8cf4371bd938b7) )    /* video timing (not used) */
 2025  
 2026      ROM_REGION( 0x0200, "namco", 0 )
 2027      ROM_LOAD( "bos1-1.1d",    0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
 2028      ROM_LOAD( "bos1-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2029  
 2030      ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
 2031      ROM_LOAD( "bos1_9.5n",    0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
 2032      ROM_LOAD( "bos1_10.5m",   0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
 2033      ROM_LOAD( "bos1_11.5k",   0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
 2034  ROM_END
 2035  
 2036  ROM_START( boscoo2 )
 2037      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 2038      ROM_LOAD( "bos1_1.3n",    0x0000, 0x1000, CRC(0d9920e7) SHA1(e7633233f603ccb5b7a970ed5b58ef361ef2c94e) )
 2039      ROM_LOAD( "bos1_2.3m",    0x1000, 0x1000, CRC(2d8f3ebe) SHA1(75de1cba7531ae4bf7fbbef7b8e37b9fec4ed0d0) )
 2040      ROM_LOAD( "bos1_3.3l",    0x2000, 0x1000, CRC(c80ccfa5) SHA1(f2bbec2ea9846d4601f06c0b4242744447a88fda) )
 2041      ROM_LOAD( "bos1_4.3k",    0x3000, 0x1000, CRC(7ebea2b8) SHA1(92fc66526ed77f3efd947b7d321b255aba4a0140) )
 2042  
 2043      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2044      ROM_LOAD( "bos1_5b.3j",   0x0000, 0x1000, CRC(3d6955a8) SHA1(f89860d74865da5ced2f5b2196bdaa8eeb5e2322) )
 2045      ROM_LOAD( "bos1_6.3h",    0x1000, 0x1000, CRC(31b8c648) SHA1(de0db24d385d2361ec989bf32388df8202ad535c) )
 2046  
 2047      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 2048      ROM_LOAD( "bos1_7.3e",    0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
 2049  
 2050      ROM_REGION( 0x1000, "gfx1", 0 )
 2051      ROM_LOAD( "bos1_14.5d",   0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
 2052  
 2053      ROM_REGION( 0x1000, "gfx2", 0 )
 2054      ROM_LOAD( "bos1_13.5e",   0x0000, 0x1000, CRC(e869219c) SHA1(425614cd0642743a82ef9c1aada29774a92203ea) )
 2055  
 2056      ROM_REGION( 0x0100, "gfx3", 0 )
 2057      ROM_LOAD( "bos1-4.2r",    0x0000, 0x0100, CRC(9b69b543) SHA1(47af3f67e50794e839b74fe61197af2228084efd) )    /* dots */
 2058  
 2059      ROM_REGION( 0x0260, "proms", 0 )
 2060      ROM_LOAD( "bos1-6.6b",    0x0000, 0x0020, CRC(d2b96fb0) SHA1(54c100ec9d173d7dd48a453ebed5f625053cb6e0) )    /* palette */
 2061      ROM_LOAD( "bos1-5.4m",    0x0020, 0x0100, CRC(4e15d59c) SHA1(3542ead6421d169c3569e121ec2be304e108787c) )    /* lookup table */
 2062      ROM_LOAD( "bos1-3.2d",    0x0120, 0x0020, CRC(b88d5ba9) SHA1(7b97a38a540b7ca4b7d9ae338ec38b9b1a337846) )    /* video layout (not used) */
 2063      ROM_LOAD( "bos1-7.7h",    0x0140, 0x0020, CRC(87d61353) SHA1(c7493e52662c921625676a4a4e8cf4371bd938b7) )    /* video timing (not used) */
 2064  
 2065      ROM_REGION( 0x0200, "namco", 0 )
 2066      ROM_LOAD( "bos1-1.1d",    0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
 2067      ROM_LOAD( "bos1-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2068  
 2069      ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
 2070      ROM_LOAD( "bos1_9.5n",    0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
 2071      ROM_LOAD( "bos1_10.5m",   0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
 2072      ROM_LOAD( "bos1_11.5k",   0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
 2073  ROM_END
 2074  
 2075  /*
 2076      Bosconian - Midway Version
 2077  
 2078      CPU/Sound Board: A084-91412-B550
 2079      Video Board:     A084-91413-B550
 2080  */
 2081  
 2082  ROM_START( boscomd )
 2083      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 2084      ROM_LOAD( "3n",       0x0000, 0x1000, CRC(441b501a) SHA1(7b4921ff40b3c56950fd32aa0ec5563b02a00929) )
 2085      ROM_LOAD( "3m",       0x1000, 0x1000, CRC(a3c5c7ef) SHA1(70a095a8dbca857245a70404f803916f519e0cbc) )
 2086      ROM_LOAD( "3l",       0x2000, 0x1000, CRC(6ca9a0cf) SHA1(8f70e29beae921e63cd65689a618ca678dd14614) )
 2087      ROM_LOAD( "3k",       0x3000, 0x1000, CRC(d83bacc5) SHA1(cf2fbfa81dabb9b6bcf436d61992e705723776fb) )
 2088  
 2089      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2090      ROM_LOAD( "3j",       0x0000, 0x1000, CRC(4374e39a) SHA1(7571fd5961f49a0e9ba4301ddd0aca52e94e2f8b) )
 2091      ROM_LOAD( "3h",       0x1000, 0x1000, CRC(04e9fcef) SHA1(2115a9718d511854848704e2693f9efa1c80a307) )
 2092  
 2093      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 2094      ROM_LOAD( "2900.3e",      0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
 2095  
 2096      ROM_REGION( 0x1000, "gfx1", 0 )
 2097      ROM_LOAD( "5300.5d",      0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
 2098  
 2099      ROM_REGION( 0x1000, "gfx2", 0 )
 2100      ROM_LOAD( "5200.5e",      0x0000, 0x1000, CRC(e869219c) SHA1(425614cd0642743a82ef9c1aada29774a92203ea) )
 2101  
 2102      ROM_REGION( 0x0100, "gfx3", 0 )
 2103      ROM_LOAD( "prom.2d",      0x0000, 0x0100, CRC(9b69b543) SHA1(47af3f67e50794e839b74fe61197af2228084efd) )    /* dots */
 2104  
 2105      ROM_REGION( 0x0260, "proms", 0 )
 2106      ROM_LOAD( "bosco.6b",     0x0000, 0x0020, CRC(d2b96fb0) SHA1(54c100ec9d173d7dd48a453ebed5f625053cb6e0) )    /* palette */
 2107      ROM_LOAD( "bosco.4m",     0x0020, 0x0100, CRC(4e15d59c) SHA1(3542ead6421d169c3569e121ec2be304e108787c) )    /* lookup table */
 2108      ROM_LOAD( "prom.2r",      0x0120, 0x0020, CRC(b88d5ba9) SHA1(7b97a38a540b7ca4b7d9ae338ec38b9b1a337846) )    /* video layout (not used) */
 2109      ROM_LOAD( "prom.7h",      0x0140, 0x0020, CRC(87d61353) SHA1(c7493e52662c921625676a4a4e8cf4371bd938b7) )    /* video timing (not used) */
 2110  
 2111      ROM_REGION( 0x0200, "namco", 0 )
 2112      ROM_LOAD( "prom.1d",      0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
 2113      ROM_LOAD( "prom.5c",      0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2114  
 2115      ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
 2116      ROM_LOAD( "4900.5n",      0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
 2117      ROM_LOAD( "5000.5m",      0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
 2118      ROM_LOAD( "5100.5l",      0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
 2119  
 2120      ROM_REGION( 0x0001, "pal_vidbd", 0 ) /* PAL located on the video board */
 2121      ROM_LOAD( "0066-005xx-xxqx.5a", 0x00000, 0x00001, NO_DUMP ) /* According to the manual it's a PAL. What type is unknown. */
 2122  ROM_END
 2123  
 2124  ROM_START( boscomdo )
 2125      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 2126      ROM_LOAD( "2300.3n",      0x0000, 0x1000, CRC(db6128b0) SHA1(ddd285f7e00d5e58ab9b15838528e0020d47fcd2) )
 2127      ROM_LOAD( "2400.3m",      0x1000, 0x1000, CRC(86907614) SHA1(3295ab6c5171a069875c2239b3325296c1df6031) )
 2128      ROM_LOAD( "2500.3l",      0x2000, 0x1000, CRC(a21fae11) SHA1(dff38d90ee30558274d2d399edc3281c2ef5cb69) )
 2129      ROM_LOAD( "2600.3k",      0x3000, 0x1000, CRC(11d6ae23) SHA1(f2f72f5c777b684f7ffd53b9c034560211113499) )
 2130  
 2131      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2132      ROM_LOAD( "2700.3j",      0x0000, 0x1000, CRC(7254e65e) SHA1(c2ee29fcb5173e8d46a80a8a1b931a53dbdeae66) )
 2133      ROM_LOAD( "2800.3h",      0x1000, 0x1000, CRC(31b8c648) SHA1(de0db24d385d2361ec989bf32388df8202ad535c) )
 2134  
 2135      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 2136      ROM_LOAD( "2900.3e",      0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
 2137  
 2138      ROM_REGION( 0x1000, "gfx1", 0 )
 2139      ROM_LOAD( "5300.5d",      0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
 2140  
 2141      ROM_REGION( 0x1000, "gfx2", 0 )
 2142      ROM_LOAD( "5200.5e",      0x0000, 0x1000, CRC(e869219c) SHA1(425614cd0642743a82ef9c1aada29774a92203ea) )
 2143  
 2144      ROM_REGION( 0x0100, "gfx3", 0 )
 2145      ROM_LOAD( "prom.2d",      0x0000, 0x0100, CRC(9b69b543) SHA1(47af3f67e50794e839b74fe61197af2228084efd) )    /* dots */
 2146  
 2147      ROM_REGION( 0x0260, "proms", 0 )
 2148      ROM_LOAD( "bosco.6b",     0x0000, 0x0020, CRC(d2b96fb0) SHA1(54c100ec9d173d7dd48a453ebed5f625053cb6e0) )    /* palette */
 2149      ROM_LOAD( "bosco.4m",     0x0020, 0x0100, CRC(4e15d59c) SHA1(3542ead6421d169c3569e121ec2be304e108787c) )    /* lookup table */
 2150      ROM_LOAD( "prom.2r",      0x0120, 0x0020, CRC(b88d5ba9) SHA1(7b97a38a540b7ca4b7d9ae338ec38b9b1a337846) )    /* video layout (not used) */
 2151      ROM_LOAD( "prom.7h",      0x0140, 0x0020, CRC(87d61353) SHA1(c7493e52662c921625676a4a4e8cf4371bd938b7) )    /* video timing (not used) */
 2152  
 2153      ROM_REGION( 0x0200, "namco", 0 )
 2154      ROM_LOAD( "prom.1d",      0x0000, 0x0100, CRC(de2316c6) SHA1(0e55c56046331888d1d3f0d9823d2ceb203e7d3f) )
 2155      ROM_LOAD( "prom.5c",      0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2156  
 2157      ROM_REGION( 0x3000, "52xx", 0 ) /* ROMs for digitised speech */
 2158      ROM_LOAD( "4900.5n",      0x0000, 0x1000, CRC(09acc978) SHA1(2b264aaeb6eba70ad91593413dca733990e5467b) )
 2159      ROM_LOAD( "5000.5m",      0x1000, 0x1000, CRC(e571e959) SHA1(9c81d7bec73bc605f7dd9a089171b0f34c4bb09a) )
 2160      ROM_LOAD( "5100.5l",      0x2000, 0x1000, CRC(17ac9511) SHA1(266f3fae90d2fe38d109096d352863a52b379899) )
 2161  
 2162      ROM_REGION( 0x0001, "pal_vidbd", 0 ) /* PAL located on the video board */
 2163      ROM_LOAD( "0066-005xx-xxqx.5a", 0x00000, 0x00001, NO_DUMP ) /* According to the manual it's a PAL. What type is unknown. */
 2164  ROM_END
 2165  
 2166  /**********************************************************************************************
 2167    Galaga & clones
 2168  **********************************************************************************************/
 2169  /*
 2170  
 2171  Galaga
 2172  Namco/Midway, 1982
 2173  
 2174  PCB Layout
 2175  ----------
 2176  
 2177  Top board
 2178  
 2179  23149611 (23149631
 2180  |------------------------------------------|
 2181  |                         LM324            |
 2182  |          04M_G01.3N                      |
 2183  |                       Z80        5400    |
 2184  |          04K_G02.3M                      |
 2185  |                                          |
 2186  |   0600   04J_G03.3L                    |-|
 2187  |                                 DSW1   |
 2188  |          04H_G04.3K             DSW2   |-|
 2189  |                                          |
 2190  |   0801   04E_G05.3J   Z80               4|
 2191  |                                         4|
 2192  |                                         W|
 2193  |          *            5100              A|
 2194  |   0801                                  Y|
 2195  |                                TD62064   |
 2196  |          04D_G06.3E   Z80                |
 2197  |                                        |-|
 2198  |   0801                                 |
 2199  |          *                             |-|
 2200  |                       0702     VOL       |
 2201  |                                    MB3730|
 2202  |GG1-1.1D                                  |
 2203  |                       GG1-2.5C           |
 2204  |       3101                               |
 2205  |       3101  4066                18.432MHz|
 2206  |------------------------------------------|
 2207  Notes:
 2208        GG1-1.1D & GG1-2.5C are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129).
 2209        All other ROMs are 2732 EPROMs (i.e. 04*.*).
 2210        *: Unpopulated sockets
 2211  
 2212        VSync           : 60.606060Hz
 2213        Z80 clocks (all): 1.536MHz
 2214        5400 clock      : 1.536MHz
 2215        5100 clock      : 1.536MHz
 2216  
 2217        3101   : 16bytes x4 bit Bipolar SRAM, compatible with 7489, MB461 & AM31L01 (trivia - This was Intel's first product, released in 1969!)
 2218        MB3730 : Sound AMP
 2219        TD62064: Darlington transistor for driving coin counters.
 2220        4066   : Quad Bilateral Switch logic IC, used to mix several sound sources to one output.
 2221  
 2222        NAMCO customs:
 2223                      0600 (DIP28): Bus Interface IC
 2224                      0801 (DIP28): Multi CPU Bus Controller IC
 2225                      5100 (DIP42): Controls player input, coins, DSW's (custom 4 bit I/O Microcontroller)
 2226                      0702 (DIP28): Sync Generator/Clock Divider IC
 2227                      5400 (DIP28): MUX 4-channel Audio Generator IC. Generates 'death bang'.
 2228                                    This is not a Z80 with swapped pins as many sites have reported.
 2229  
 2230        Pinouts:
 2231        Galaga PCB edge connector pinouts
 2232  
 2233        Parts Side    Pin   Pin Solder Side
 2234        ----------------------------------
 2235        Logic Ground   A     1  Logic Ground
 2236        Speaker +      B     2  Speaker -
 2237                       C     3  Coin Counter 1
 2238        P1 Start Lamp  D     4  P2 Start Lamp
 2239        +12            E     5  +12
 2240        +5             F     6  +5
 2241        Ground         H     7  Ground
 2242        Service Credit J     8  Test
 2243        Coin 1         K     9  Coin 2
 2244        Player 1 Start L     10 Player 2 Start
 2245        P1 Fire        M     11 P2 Fire
 2246        P1 Left        N     12 P2 Left
 2247                       P     13
 2248        P1 Right       R     14 P2 Right
 2249                       S     15
 2250                       T     16
 2251                       U     17
 2252                       V     18
 2253                       W     19
 2254                       X     20
 2255        Coin Counter 2 Y     21 Cocktail Mode
 2256        Ground         Z     22 Ground
 2257  
 2258        Pin21: Ground this pin for cocktail mode
 2259  
 2260  
 2261  Bottom board
 2262  
 2263  23149612 (23149632
 2264  |------------------------------------------|
 2265  | 0700     GG1-4.2N           GG1-5.5N     |
 2266  |                        *             RGBS|
 2267  | 0015                                     |
 2268  |                                          |
 2269  |              2114                        |
 2270  | 6116                               8147  |
 2271  |              2114    07M_G08.4L          |
 2272  |                                    8147  |
 2273  |              2114                        |
 2274  | 0400                               8147  |
 2275  |              2114                        |
 2276  |                                    8147  |
 2277  |              2114    0200                |
 2278  |                                          |
 2279  |              2114                        |
 2280  |                      07H_G09.4F    8147  |
 2281  |                                          |
 2282  |                                    8147  |
 2283  |                                          |
 2284  |                      07E_G10.4D    8147  |
 2285  |                                          |
 2286  |                                    8147  |
 2287  | GG1-3.1C                                 |
 2288  |                                          |
 2289  |                                          |
 2290  |------------------------------------------|
 2291  Notes:
 2292        RGBS: Video output socket (Red, Green Blue, Sync to monitor)
 2293        GG1*  are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129).
 2294        All other ROMs are 2732 EPROMs.
 2295        *: Unpopulated socket
 2296  
 2297        2114    : 1K x4 SRAM
 2298        6116    : 2K x8 SRAM
 2299        8147    : 4K x1 SRAM (Note - you can remove the eight 8147 RAMs and install two 2148s (1K x 4) in their place at positions 6H and 6B.
 2300  
 2301        Bootup RAM Errors
 2302        Error Code    Meaning
 2303        RAM OK        All RAMs are good
 2304        RAM 0L        RAM located on Video PC board at position 1K is bad
 2305        RAM 0H        RAM located on Video PC board at position 1K is bad
 2306        RAM 1L        RAM located on Video PC board at position 1K is bad
 2307        RAM 1H        RAM located on Video PC board at position 1K is bad
 2308        RAM 2L        RAM located on Video PC board at position 3E is bad
 2309        RAM 2H        RAM located on Video PC board at position 3F is bad
 2310        RAM 3L        RAM located on Video PC board at position 3K is bad
 2311        RAM 3H        RAM located on Video PC board at position 3L is bad
 2312        RAM 4L        RAM located on Video PC board at position 3H is bad
 2313        RAM 4H        RAM located on Video PC board at position 3J is bad
 2314  
 2315        Bootup ROM Errors
 2316        Error Code   Meaning
 2317        ROM OK       All ROMs are good
 2318        ROM 01       ROM located on CPU PC board at position 3N is bad
 2319        ROM 02       ROM located on CPU PC board at position 3M is bad
 2320        ROM 03       ROM located on CPU PC board at position 3L is bad
 2321        ROM 04       ROM located on CPU PC board at position 3K is bad
 2322        ROM 11       ROM located on CPU PC board at position 3J is bad
 2323        ROM 21       ROM located on CPU PC board at position 3E is bad
 2324  
 2325        NAMCO customs:
 2326                      0015 (DIP28): Video RAM addresser IC
 2327                      0200 (DIP28): Graphics ROM Data Custom Shift Register IC
 2328                      0400 (DIP28): Motion Object and Scratch RAM to CPU Bus Interface IC
 2329                      0702 (DIP28): Sync Generator/Clock Divider IC
 2330  
 2331  */
 2332  
 2333  ROM_START( galaga )
 2334      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2335      ROM_LOAD( "gg1_1b.3p",    0x0000, 0x1000, CRC(ab036c9f) SHA1(ca7f5da42d4e76fd89bb0b35198a23c01462fbfe) )
 2336      ROM_LOAD( "gg1_2b.3m",    0x1000, 0x1000, CRC(d9232240) SHA1(ab202aa259c3d332ef13dfb8fc8580ce2a5a253d) )
 2337      ROM_LOAD( "gg1_3.2m",     0x2000, 0x1000, CRC(753ce503) SHA1(481f443aea3ed3504ec2f3a6bfcf3cd47e2f8f81) )
 2338      ROM_LOAD( "gg1_4b.2l",    0x3000, 0x1000, CRC(499fcc76) SHA1(ddb8b121903646c320939c7d13f4aa4ebb130378) )
 2339  
 2340      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2341      ROM_LOAD( "gg1_5b.3f",    0x0000, 0x1000, CRC(bb5caae3) SHA1(e957a581463caac27bc37ca2e2a90f27e4f62b6f) )
 2342  
 2343      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2344      ROM_LOAD( "gg1_7b.2c",    0x0000, 0x1000, CRC(d016686b) SHA1(44c1a04fba3c7c826ff484185cb881b4b22e6657) )
 2345  
 2346      ROM_REGION( 0x1000, "gfx1", 0 )
 2347      ROM_LOAD( "gg1_9.4l",     0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
 2348  
 2349      ROM_REGION( 0x2000, "gfx2", 0 )
 2350      ROM_LOAD( "gg1_11.4d",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2351      ROM_LOAD( "gg1_10.4f",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2352  
 2353      ROM_REGION( 0x0220, "proms", 0 )
 2354      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2355      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2356      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2357  
 2358      ROM_REGION( 0x0200, "namco", 0 )
 2359      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2360      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2361  ROM_END
 2362  
 2363  ROM_START( galagao )
 2364      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2365      ROM_LOAD( "gg1-1.3p",     0x0000, 0x1000, CRC(a3a0f743) SHA1(6907773db7c002ecde5e41853603d53387c5c7cd) )
 2366      ROM_LOAD( "gg1-2.3m",     0x1000, 0x1000, CRC(43bb0d5c) SHA1(666975aed5ce84f09794c54b550d64d95ab311f0) )
 2367      ROM_LOAD( "gg1-3.2m",     0x2000, 0x1000, CRC(753ce503) SHA1(481f443aea3ed3504ec2f3a6bfcf3cd47e2f8f81) )
 2368      ROM_LOAD( "gg1-4.2l",     0x3000, 0x1000, CRC(83874442) SHA1(366cb0dbd31b787e64f88d182108b670d03b393e) )
 2369  
 2370      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2371      ROM_LOAD( "gg1-5.3f",     0x0000, 0x1000, CRC(3102fccd) SHA1(d29b68d6aab3217fa2106b3507b9273ff3f927bf) )
 2372  
 2373      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2374      ROM_LOAD( "gg1-7.2c",     0x0000, 0x1000, CRC(8995088d) SHA1(d6cb439de0718826d1a0363c9d77de8740b18ecf) )
 2375  
 2376      ROM_REGION( 0x1000, "gfx1", 0 )
 2377      ROM_LOAD( "gg1-9.4l",     0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
 2378  
 2379      ROM_REGION( 0x2000, "gfx2", 0 )
 2380      ROM_LOAD( "gg1-11.4d",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2381      ROM_LOAD( "gg1-10.4f",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2382  
 2383      ROM_REGION( 0x0220, "proms", 0 )
 2384      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2385      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2386      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2387  
 2388      ROM_REGION( 0x0200, "namco", 0 )
 2389      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2390      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2391  ROM_END
 2392  
 2393  ROM_START( galagamw )
 2394      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2395      ROM_LOAD( "3200a.bin",    0x0000, 0x1000, CRC(3ef0b053) SHA1(0c04a362b737998c0952a753fb3fd8c8a17e9b46) )
 2396      ROM_LOAD( "3300b.bin",    0x1000, 0x1000, CRC(1b280831) SHA1(f7ea12e61929717ebe43a4198a97f109845a2c62) )
 2397      ROM_LOAD( "3400c.bin",    0x2000, 0x1000, CRC(16233d33) SHA1(a7eb799be5e23058754a92b15e6527bfbb47a354) )
 2398      ROM_LOAD( "3500d.bin",    0x3000, 0x1000, CRC(0aaf5c23) SHA1(3f4b0bb960bf002261e9c1278c88f594c6aa8ab6) )
 2399  
 2400      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2401      ROM_LOAD( "3600e.bin",    0x0000, 0x1000, CRC(bc556e76) SHA1(0d3d68243c4571d985b4d8f7e0ea9f6fcffa2116) )
 2402  
 2403      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2404      ROM_LOAD( "3700g.bin",    0x0000, 0x1000, CRC(b07f0aa4) SHA1(7528644a8480d0be2d0d37069515ed319e94778f) )
 2405  
 2406      ROM_REGION( 0x1000, "gfx1", 0 )
 2407      ROM_LOAD( "2600j.bin",    0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
 2408  
 2409      ROM_REGION( 0x2000, "gfx2", 0 )
 2410      ROM_LOAD( "2800l.bin",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2411      ROM_LOAD( "2700k.bin",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2412  
 2413      ROM_REGION( 0x0220, "proms", 0 )
 2414      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2415      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2416      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2417  
 2418      ROM_REGION( 0x0200, "namco", 0 )
 2419      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2420      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2421  ROM_END
 2422  
 2423  ROM_START( galagamf )
 2424      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2425      ROM_LOAD( "3200a.bin",    0x0000, 0x1000, CRC(3ef0b053) SHA1(0c04a362b737998c0952a753fb3fd8c8a17e9b46) )
 2426      ROM_LOAD( "3300b.bin",    0x1000, 0x1000, CRC(1b280831) SHA1(f7ea12e61929717ebe43a4198a97f109845a2c62) )
 2427      ROM_LOAD( "3400c.bin",    0x2000, 0x1000, CRC(16233d33) SHA1(a7eb799be5e23058754a92b15e6527bfbb47a354) )
 2428      ROM_LOAD( "3500d.bin",    0x3000, 0x1000, CRC(0aaf5c23) SHA1(3f4b0bb960bf002261e9c1278c88f594c6aa8ab6) )
 2429  
 2430      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2431      ROM_LOAD( "3600fast.bin", 0x0000, 0x1000, CRC(23d586e5) SHA1(43346c69385e9091e64cff6c027ac2689cafcbb9) )
 2432  
 2433      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2434      ROM_LOAD( "3700g.bin",    0x0000, 0x1000, CRC(b07f0aa4) SHA1(7528644a8480d0be2d0d37069515ed319e94778f) )
 2435  
 2436      ROM_REGION( 0x1000, "gfx1", 0 )
 2437      ROM_LOAD( "2600j.bin",    0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
 2438  
 2439      ROM_REGION( 0x2000, "gfx2", 0 )
 2440      ROM_LOAD( "2800l.bin",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2441      ROM_LOAD( "2700k.bin",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2442  
 2443      ROM_REGION( 0x0220, "proms", 0 )
 2444      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2445      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2446      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2447  
 2448      ROM_REGION( 0x0200, "namco", 0 )
 2449      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2450      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2451  ROM_END
 2452  
 2453  ROM_START( galagamk )
 2454      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2455      ROM_LOAD( "mk2-1",        0x0000, 0x1000, CRC(23cea1e2) SHA1(18db33ade0ca6e47cc48aa151d2ccbb4646e3ae3) )
 2456      ROM_LOAD( "mk2-2",        0x1000, 0x1000, CRC(89695b1a) SHA1(fda5557018884e903f855bf3b69a25d75ed8a767) )
 2457      ROM_LOAD( "3400c.bin",    0x2000, 0x1000, CRC(16233d33) SHA1(a7eb799be5e23058754a92b15e6527bfbb47a354) )
 2458      ROM_LOAD( "mk2-4",        0x3000, 0x1000, CRC(24b767f5) SHA1(d4c03e2ed582cfa7f8168ac352f790ef7af54cb8) )
 2459  
 2460      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2461      ROM_LOAD( "gg1-5.3f",     0x0000, 0x1000, CRC(3102fccd) SHA1(d29b68d6aab3217fa2106b3507b9273ff3f927bf) )
 2462  
 2463      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2464      ROM_LOAD( "gg1-7b.2c",    0x0000, 0x1000, CRC(d016686b) SHA1(44c1a04fba3c7c826ff484185cb881b4b22e6657) )
 2465  
 2466      ROM_REGION( 0x1000, "gfx1", 0 )
 2467      ROM_LOAD( "gg1-9.4l",     0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
 2468  
 2469      ROM_REGION( 0x2000, "gfx2", 0 )
 2470      ROM_LOAD( "gg1-11.4d",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2471      ROM_LOAD( "gg1-10.4f",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2472  
 2473      ROM_REGION( 0x0220, "proms", 0 )
 2474      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2475      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2476      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2477  
 2478      ROM_REGION( 0x0200, "namco", 0 )
 2479      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2480      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2481  ROM_END
 2482  
 2483  ROM_START( gallag )
 2484      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2485      ROM_LOAD( "gallag.1",     0x0000, 0x1000, CRC(a3a0f743) SHA1(6907773db7c002ecde5e41853603d53387c5c7cd) )
 2486      ROM_LOAD( "gallag.2",     0x1000, 0x1000, CRC(5eda60a7) SHA1(853d7b974dd04abd7af3a8ba2681dfabce4dce18) )
 2487      ROM_LOAD( "gallag.3",     0x2000, 0x1000, CRC(753ce503) SHA1(481f443aea3ed3504ec2f3a6bfcf3cd47e2f8f81) )
 2488      ROM_LOAD( "gallag.4",     0x3000, 0x1000, CRC(83874442) SHA1(366cb0dbd31b787e64f88d182108b670d03b393e) )
 2489  
 2490      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2491      ROM_LOAD( "gallag.5",     0x0000, 0x1000, CRC(3102fccd) SHA1(d29b68d6aab3217fa2106b3507b9273ff3f927bf) )
 2492  
 2493      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2494      ROM_LOAD( "gallag.7",     0x0000, 0x1000, CRC(8995088d) SHA1(d6cb439de0718826d1a0363c9d77de8740b18ecf) )
 2495  
 2496      ROM_REGION( 0x10000, "sub3", 0 )    /* 64k for a Z80 which emulates the custom I/O chip (not used) */
 2497      ROM_LOAD( "gallag.6",     0x0000, 0x1000, CRC(001b70bc) SHA1(b465eee91e75257b7b049d49c0064ab5fd66c576) )
 2498  
 2499      ROM_REGION( 0x1000, "gfx1", 0 )
 2500      ROM_LOAD( "gallag.8",     0x0000, 0x1000, CRC(169a98a4) SHA1(edbeb11076061e744ea88d9899dbdfe0964c7e78) )
 2501  
 2502      ROM_REGION( 0x2000, "gfx2", 0 )
 2503      ROM_LOAD( "gallag.a",    0x0000, 0x1000, CRC(ad447c80) SHA1(e697c180178cabd1d32483c5d8889a40633f7857) )
 2504      ROM_LOAD( "gallag.9",    0x1000, 0x1000, CRC(dd6f1afc) SHA1(c340ed8c25e0979629a9a1730edc762bd72d0cff) )
 2505  
 2506      ROM_REGION( 0x0220, "proms", 0 )
 2507      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2508      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2509      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2510  
 2511      ROM_REGION( 0x0200, "namco", 0 )
 2512      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2513      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2514  ROM_END
 2515  
 2516  ROM_START( gatsbee )
 2517      ROM_REGION( 0x10000, "maincpu", 0 )     /* 64k for code for the first CPU  */
 2518      ROM_LOAD( "1.4b",         0x0000, 0x1000, CRC(9fb8e28b) SHA1(7171e3fb37b0d6cc8f7a023c1775080d5986de99) )
 2519      ROM_LOAD( "2.4c",         0x1000, 0x1000, CRC(bf6cb840) SHA1(5763140d32d35a38cdcb49e6de1fd5b07a9e8cc2) )
 2520      ROM_LOAD( "3.4d",         0x2000, 0x1000, CRC(3604e2dd) SHA1(1736cf8497f7ac28e92ca94fa137c144353dc192) )
 2521      ROM_LOAD( "4.4e",         0x3000, 0x1000, CRC(bf9f613b) SHA1(41c852fc77f0f35bf48a5b81a19234ed99871c89) )
 2522  
 2523      ROM_REGION( 0x10000, "sub", 0 )     /* 64k for the second CPU */
 2524      ROM_LOAD( "gg1-5.3f",     0x0000, 0x1000, CRC(3102fccd) SHA1(d29b68d6aab3217fa2106b3507b9273ff3f927bf) )    // 5.4j
 2525  
 2526      ROM_REGION( 0x10000, "sub2", 0 )     /* 64k for the third CPU  */
 2527      ROM_LOAD( "gg1-7.2c",     0x0000, 0x1000, CRC(8995088d) SHA1(d6cb439de0718826d1a0363c9d77de8740b18ecf) )    // 7.4k
 2528  
 2529      ROM_REGION( 0x10000, "sub3", 0 )    /* 64k for a Z80 which emulates the custom I/O chip (not used) */
 2530      ROM_LOAD( "gallag.6",     0x0000, 0x1000, CRC(001b70bc) SHA1(b465eee91e75257b7b049d49c0064ab5fd66c576) )
 2531  
 2532      ROM_REGION( 0x2000, "gfx1", 0 )
 2533      ROM_LOAD( "8.5r",  0x0000, 0x2000, CRC(b324f650) SHA1(7bcb254f7cf03bd84291b9fdc27b8962b3e12aa4) )
 2534  
 2535      ROM_REGION( 0x2000, "gfx2", 0 )
 2536      ROM_LOAD( "9.6a",         0x0000, 0x1000, CRC(22e339d5) SHA1(9ac2887ede802d28daa4ad0a0a54bcf7b1155a2e) )
 2537      ROM_LOAD( "10.7a",        0x1000, 0x1000, CRC(60dcf940) SHA1(6530aa5b4afef4a8422ece76a93d0c5b1d93355e) )
 2538  
 2539      ROM_REGION( 0x0220, "proms", 0 )
 2540      ROM_LOAD( "prom-5.5n",    0x0000, 0x0020, CRC(54603c6b) SHA1(1a6dea13b4af155d9cb5b999a75d4f1eb9c71346) )    /* palette */
 2541      ROM_LOAD( "prom-4.2n",    0x0020, 0x0100, CRC(59b6edab) SHA1(0281de86c236c88739297ff712e0a4f5c8bf8ab9) )    /* char lookup table */
 2542      ROM_LOAD( "prom-3.1c",    0x0120, 0x0100, CRC(4a04bb6b) SHA1(cdd4bc1013f5c11984fdc4fd10e2d2e27120c1e5) )    /* sprite lookup table */
 2543  
 2544      ROM_REGION( 0x0200, "namco", 0 )
 2545      ROM_LOAD( "prom-1.1d",    0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 2546      ROM_LOAD( "prom-2.5c",    0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2547  ROM_END
 2548  
 2549  /**********************************************************************************************
 2550    Xevious & clones
 2551  **********************************************************************************************/
 2552  
 2553  /*
 2554      Xevious - Namco Version
 2555  
 2556      Single/Dual Board?
 2557  */
 2558  
 2559  ROM_START( xevious )
 2560      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2561      ROM_LOAD( "xvi_1.3p",     0x0000, 0x1000, CRC(09964dda) SHA1(4882b25b0938a903f3a367455ba788a30759b5b0) )
 2562      ROM_LOAD( "xvi_2.3m",     0x1000, 0x1000, CRC(60ecce84) SHA1(8adc60a5fcbca74092518dbc570ffff0f04c5b17) )
 2563      ROM_LOAD( "xvi_3.2m",     0x2000, 0x1000, CRC(79754b7d) SHA1(c6a154858716e1f073b476824b183de20e06d093) )
 2564      ROM_LOAD( "xvi_4.2l",     0x3000, 0x1000, CRC(c7d4bbf0) SHA1(4b846de204d08651253d3a141677c8a31626af07) )
 2565  
 2566      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2567      ROM_LOAD( "xvi_5.3f",     0x0000, 0x1000, CRC(c85b703f) SHA1(15f1c005b9d806a384ab1f2240b9c580bfe83893) )
 2568      ROM_LOAD( "xvi_6.3j",     0x1000, 0x1000, CRC(e18cdaad) SHA1(6b79efee1a9642edb9f752101737132401248aed) )
 2569  
 2570      ROM_REGION( 0x10000, "sub2", 0 )
 2571      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2572  
 2573      ROM_REGION( 0x1000, "gfx1", 0 )
 2574      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2575  
 2576      ROM_REGION( 0x2000, "gfx2", 0 )
 2577      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2578      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2579  
 2580      ROM_REGION( 0xa000, "gfx3", 0 )
 2581      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2582      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2583      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2584      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2585      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2586      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2587  
 2588      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2589      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2590      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2591      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2592  
 2593      ROM_REGION( 0x0b00, "proms", 0 )
 2594      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2595      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2596      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2597      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2598      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2599      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2600      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2601  
 2602      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2603      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2604      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2605  ROM_END
 2606  
 2607  /*
 2608      Xevious - Atari Version
 2609  
 2610      CPU/Sound Board: A039785
 2611      Video Board:     A039787
 2612  */
 2613  
 2614  ROM_START( xeviousa )
 2615      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2616      ROM_LOAD( "xea-1m-a.bin", 0x0000, 0x2000, CRC(8c2b50ec) SHA1(f770873b711d838556dde67a8aac8a7f572fcc5b) )
 2617      ROM_LOAD( "xea-1l-a.bin", 0x2000, 0x2000, CRC(0821642b) SHA1(c6c322c61d0985a2ac59f5e92d4e351107afb9eb) )
 2618  
 2619      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2620      ROM_LOAD( "xea-4c-a.bin", 0x0000, 0x2000, CRC(14d8fa03) SHA1(e8114141394adda86184b146f2497cfeef7fc2eb) )
 2621  
 2622      ROM_REGION( 0x10000, "sub2", 0 )
 2623      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2624  
 2625      ROM_REGION( 0x1000, "gfx1", 0 )
 2626      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2627  
 2628      ROM_REGION( 0x2000, "gfx2", 0 )
 2629      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2630      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2631  
 2632      ROM_REGION( 0xa000, "gfx3", 0 )
 2633      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2634      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2635      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2636      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2637      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2638      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2639  
 2640      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2641      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2642      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2643      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2644  
 2645      ROM_REGION( 0x0b00, "proms", 0 )
 2646      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2647      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2648      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2649      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2650      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2651      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2652      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2653  
 2654      ROM_REGION( 0x0001, "pals_vidbd", 0) /* PAL's located on the video board */
 2655      ROM_LOAD( "137294-001.1f", 0x0000, 0x0001, NO_DUMP ) /* N82S153N */
 2656  
 2657      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2658      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2659      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2660  ROM_END
 2661  
 2662  ROM_START( xeviousb )
 2663      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2664      ROM_LOAD( "1m.bin",       0x0000, 0x2000, CRC(e82a22f6) SHA1(6fd09a7fb263cda3d5268cc6d7bfe71a57ac4b47) )
 2665      ROM_LOAD( "1l.bin",       0x2000, 0x2000, CRC(13831df9) SHA1(a7892d1d98868a83a5d1092976873b82577e9e94) )
 2666  
 2667      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2668      ROM_LOAD( "4c.bin",       0x0000, 0x2000, CRC(827e7747) SHA1(d22645d71b164613834336e26e6942506a0e7eaa) )
 2669  
 2670      ROM_REGION( 0x10000, "sub2", 0 )
 2671      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2672  
 2673      ROM_REGION( 0x1000, "gfx1", 0 )
 2674      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2675  
 2676      ROM_REGION( 0x2000, "gfx2", 0 )
 2677      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2678      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2679  
 2680      ROM_REGION( 0xa000, "gfx3", 0 )
 2681      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2682      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2683      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2684      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2685      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2686      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2687  
 2688      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2689      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2690      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2691      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2692  
 2693      ROM_REGION( 0x0b00, "proms", 0 )
 2694      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2695      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2696      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2697      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2698      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2699      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2700      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2701  
 2702      ROM_REGION( 0x0001, "pals_vidbd", 0) /* PAL's located on the video board */
 2703      ROM_LOAD( "137294-001.1f", 0x0000, 0x0001, NO_DUMP ) /* N82S153N */
 2704  
 2705      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2706      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2707      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2708  ROM_END
 2709  
 2710  ROM_START( xeviousc )
 2711      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2712      ROM_LOAD( "xvi_u_.3p",    0x0000, 0x1000, CRC(7b203868) SHA1(3bafaa42bccddfaf8d9197e93416a731b7f8fb94) )
 2713      ROM_LOAD( "xv_2-2.3m",    0x1000, 0x1000, CRC(b6fe738e) SHA1(23cdf1f2c2642f9bc3f843b5c338372027032380) )
 2714      ROM_LOAD( "xv_2-3.2m",    0x2000, 0x1000, CRC(dbd52ff5) SHA1(eb42393720fc1fd4a1f6cdba87ac4177fd5827fe) )
 2715      ROM_LOAD( "xvi_u_.2l",    0x3000, 0x1000, CRC(ad12af53) SHA1(ff3a96d6f7357fb2d33cd9d77d53477b9071ffc9) )
 2716  
 2717      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2718      ROM_LOAD( "xv2_5.3f",     0x0000, 0x1000, CRC(f8cc2861) SHA1(9b02c00cff6c771d46776416295f9e12a2166cc5) )
 2719      ROM_LOAD( "xvi_6.3j",     0x1000, 0x1000, CRC(e18cdaad) SHA1(6b79efee1a9642edb9f752101737132401248aed) )
 2720  
 2721      ROM_REGION( 0x10000, "sub2", 0 )
 2722      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2723  
 2724      ROM_REGION( 0x1000, "gfx1", 0 )
 2725      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2726  
 2727      ROM_REGION( 0x2000, "gfx2", 0 )
 2728      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2729      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2730  
 2731      ROM_REGION( 0xa000, "gfx3", 0 )
 2732      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2733      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2734      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2735      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2736      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2737      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2738  
 2739      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2740      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2741      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2742      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2743  
 2744      ROM_REGION( 0x0b00, "proms", 0 )
 2745      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2746      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2747      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2748      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2749      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2750      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2751      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2752  
 2753      ROM_REGION( 0x0001, "pals_vidbd", 0) /* PAL's located on the video board */
 2754      ROM_LOAD( "137294-001.1f", 0x0000, 0x0001, NO_DUMP ) /* N82S153N */
 2755  
 2756      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2757      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2758      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2759  ROM_END
 2760  
 2761  /*
 2762      Xevious Bootleg
 2763  
 2764      Dual Boards with no markings except row/column designations
 2765  */
 2766  
 2767  ROM_START( xevios )
 2768      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2769      ROM_LOAD( "4.7h",         0x0000, 0x1000, CRC(1f8ca4c0) SHA1(9fdaa2e0016c07e274544f8334778fe81b8344a5) )
 2770      ROM_LOAD( "5.6h",         0x1000, 0x1000, CRC(2e47ce8f) SHA1(fb35dd086e98279a5f17036f624ef5294c777d84) )
 2771      ROM_LOAD( "6.5h",         0x2000, 0x1000, CRC(79754b7d) SHA1(c6a154858716e1f073b476824b183de20e06d093) )
 2772      ROM_LOAD( "7.4h",         0x3000, 0x1000, CRC(17f48277) SHA1(ffe590acf07985355ef91fbe0fc3dcf6e8fd62fd) )
 2773  
 2774      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2775      ROM_LOAD( "8.2h",         0x0000, 0x1000, CRC(c85b703f) SHA1(15f1c005b9d806a384ab1f2240b9c580bfe83893) )
 2776      ROM_LOAD( "9.1h",         0x1000, 0x1000, CRC(e18cdaad) SHA1(6b79efee1a9642edb9f752101737132401248aed) )
 2777  
 2778      ROM_REGION( 0x10000, "sub2", 0 )
 2779      ROM_LOAD( "3.9h",         0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2780  
 2781      ROM_REGION( 0x1000, "gfx1", 0 )
 2782      ROM_LOAD( "17.8f",        0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2783  
 2784      ROM_REGION( 0x2000, "gfx2", 0 )
 2785      ROM_LOAD( "18.9f",        0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2786      ROM_LOAD( "19.11f",       0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2787  
 2788      ROM_REGION( 0xa000, "gfx3", 0 )
 2789      ROM_LOAD( "13.4d",        0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2790      ROM_LOAD( "15.7d",        0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2791      ROM_LOAD( "14.6d",        0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2792      ROM_LOAD( "16.8d",        0x5000, 0x2000, CRC(44262c04) SHA1(4291f83193d11064c2ba6a9af27951b93bb945c3) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2793      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2794      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2795  
 2796      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2797      ROM_LOAD( "10.1d",        0x0000, 0x1000, CRC(10baeebb) SHA1(c544c9e0bb7a1ef93b3f2c2c1397f659d5334373) )
 2798      ROM_LOAD( "11.2d",        0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2799      ROM_LOAD( "12.3d",        0x3000, 0x1000, CRC(51a4e83b) SHA1(fbf3b1e47b75c5e0b297ee2cd6597b1dfd80bc6f) )
 2800  
 2801      ROM_REGION( 0x0b00, "proms", 0 )
 2802      ROM_LOAD( "8.12h",        0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2803      ROM_LOAD( "9.13h",        0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2804      ROM_LOAD( "10.14h",       0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2805      ROM_LOAD( "7.14f",        0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2806      ROM_LOAD( "6.13f",        0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2807      ROM_LOAD( "6.5c",         0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2808      ROM_LOAD( "5.6c",         0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2809  
 2810      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2811      ROM_LOAD( "1.10f",        0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2812      ROM_LOAD( "2.10c",        0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2813  
 2814      ROM_REGION( 0x3000, "user1", 0 ) /* unknown roms */
 2815      /* extra ROMs (function unknown, could be emulation of the custom I/O */
 2816      /* chip with a Z80): */
 2817      ROM_LOAD( "1.16j",        0x0000, 0x1000, CRC(2618f0ce) SHA1(54e8644b5609d6f6ec717a7469c76901eb79f26e) )
 2818      ROM_LOAD( "2.17b",        0x1000, 0x2000, CRC(de359fac) SHA1(a55df9984bfffafeadae8a5a63b07f1fa9c5eebf) )
 2819  
 2820      ROM_REGION( 0x002c, "pals", 0 ) /* Located on the video board */
 2821      ROM_LOAD( "pal10l8.16a.bin", 0x0000, 0x002c, CRC(6fb9bd9a) SHA1(698b5fc19f5873b02a4bed7d9ec1f24763a6fef7) )
 2822  ROM_END
 2823  
 2824  ROM_START( battles )
 2825      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2826      ROM_LOAD( "b_1.bin",      0x0000, 0x2000, CRC(b6e4f4f3) SHA1(ceaaa63b50e75dcb05aeb68574336dfe56a8434a) )
 2827      ROM_LOAD( "b_2.bin",      0x2000, 0x2000, CRC(47017bc8) SHA1(0da73ae079fb6a64eed56197e2c88609ef34166c) )
 2828  
 2829      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2830      ROM_LOAD( "b_3.bin",      0x0000, 0x2000, CRC(0ede5706) SHA1(65b235c5abe487612e11d0235410f1ca59b06e95) )
 2831  
 2832      ROM_REGION( 0x10000, "sub2", 0 )
 2833      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2834  
 2835      ROM_REGION( 0x10000, "sub3", 0 )    /* 64k for the CUSTOM I/O Emulation CPU */
 2836      ROM_LOAD( "b_5.bin",      0x0000, 0x1000, CRC(23107dfb) SHA1(74c49a5648faab632ae5ed8dd18a1d8b39837e2d) )
 2837  
 2838      ROM_REGION( 0x1000, "gfx1", 0 )
 2839      ROM_LOAD( "b_9.bin",      0x0000, 0x1000, CRC(5bd6e9ae) SHA1(f16c7eec39fce856c775b2b81ab55fb42376850e) )    /* foreground characters */
 2840  
 2841      ROM_REGION( 0x2000, "gfx2", 0 )
 2842      ROM_LOAD( "b_10.bin",     0x0000, 0x1000, CRC(b43ea55d) SHA1(06f4c4e7fc71b9e173c3bdf91c40f47750051b5e) )    /* bg pattern B0 */
 2843      ROM_LOAD( "b_11.bin",     0x1000, 0x1000, CRC(73603931) SHA1(1f7824b107a5a3d5c3434f02f17173a1f85fd29c) )    /* bg pattern B1 */
 2844  
 2845      ROM_REGION( 0xa000, "gfx3", 0 )
 2846      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2847      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2848      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2849      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2850      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2851      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2852  
 2853      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2854      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2855      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2856      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2857  
 2858      ROM_REGION( 0x1400, "proms", 0 )
 2859      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2860      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2861      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2862      ROM_LOAD( "b_-bpr.bin",   0x0300, 0x0400, CRC(d2d208b1) SHA1(6c8d29912c03ee93759e24085bc66ab738768bcc) ) /* bg tiles lookup table low bits */
 2863      ROM_LOAD( "b_6bpr.bin",   0x0700, 0x0400, CRC(0260c041) SHA1(1a7516e8b18ffdd9789eec8b834c17b3ba312afe) ) /* bg tiles lookup table high bits */
 2864      ROM_LOAD( "b_4bpr.bin",   0x0b00, 0x0400, CRC(33764974) SHA1(567b048b8a93e30090ccee4f6aadc0353524d8d1) ) /* sprite lookup table low bits */
 2865      ROM_LOAD( "b_5bpr.bin",   0x0f00, 0x0400, CRC(43674c7e) SHA1(94c19a9da81839cb1dfde3f11b2fd82ffe45efb9) ) /* sprite lookup table high bits */
 2866  
 2867      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2868      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2869      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2870  ROM_END
 2871  
 2872  ROM_START( sxevious )
 2873      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2874      ROM_LOAD( "cpu_3p.rom",   0x0000, 0x1000, CRC(1c8d27d5) SHA1(2c41303d8c74acb5840295a4b460a39a9a8e21bb) )
 2875      ROM_LOAD( "cpu_3m.rom",   0x1000, 0x1000, CRC(fd04e615) SHA1(7169e7f3bd1e9cfae9671b89f2a45f56b968e1ff) )
 2876      ROM_LOAD( "xv3_3.2m",     0x2000, 0x1000, CRC(294d5404) SHA1(ecc39fb2c0065a36f20541747089b4e30dfb99b1) )
 2877      ROM_LOAD( "xv3_4.2l",     0x3000, 0x1000, CRC(6a44bf92) SHA1(0ca726f7f9528789f2a718df55e59406a283cdfa) )
 2878  
 2879      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2880      ROM_LOAD( "xv3_5.3f",     0x0000, 0x1000, CRC(d4bd3d81) SHA1(5831bb306bd650779207936bfd00f25864733abb) )
 2881      ROM_LOAD( "xv3_6.3j",     0x1000, 0x1000, CRC(af06be5f) SHA1(5a020822387ab8c69214db961180760fa9853e6e) )
 2882  
 2883      ROM_REGION( 0x10000, "sub2", 0 )
 2884      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2885  
 2886      ROM_REGION( 0x1000, "gfx1", 0 )
 2887      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2888  
 2889      ROM_REGION( 0x2000, "gfx2", 0 )
 2890      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2891      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2892  
 2893      ROM_REGION( 0xa000, "gfx3", 0 )
 2894      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2895      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2896      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2897      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2898      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2899      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2900  
 2901      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2902      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2903      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2904      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2905  
 2906      ROM_REGION( 0x0b00, "proms", 0 )
 2907      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2908      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2909      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2910      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2911      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2912      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2913      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2914  
 2915      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2916      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2917      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2918  ROM_END
 2919  
 2920  ROM_START( sxeviousj )
 2921      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
 2922      ROM_LOAD( "xv3_1.3p",     0x0000, 0x1000, CRC(afbc3372) SHA1(9001856aad0f31b40443f21b7a895e4101684307) )
 2923      ROM_LOAD( "xv3_2.3m",     0x1000, 0x1000, CRC(1854a5ee) SHA1(2fb4034d9d757376df59378df539bf41d99ed43e) )
 2924      ROM_LOAD( "xv3_3.2m",     0x2000, 0x1000, CRC(294d5404) SHA1(ecc39fb2c0065a36f20541747089b4e30dfb99b1) )
 2925      ROM_LOAD( "xv3_4.2l",     0x3000, 0x1000, CRC(6a44bf92) SHA1(0ca726f7f9528789f2a718df55e59406a283cdfa) )
 2926  
 2927      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2928      ROM_LOAD( "xv3_5.3f",     0x0000, 0x1000, CRC(d4bd3d81) SHA1(5831bb306bd650779207936bfd00f25864733abb) )
 2929      ROM_LOAD( "xv3_6.3j",     0x1000, 0x1000, CRC(af06be5f) SHA1(5a020822387ab8c69214db961180760fa9853e6e) )
 2930  
 2931      ROM_REGION( 0x10000, "sub2", 0 )
 2932      ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
 2933  
 2934      ROM_REGION( 0x1000, "gfx1", 0 )
 2935      ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )    /* foreground characters */
 2936  
 2937      ROM_REGION( 0x2000, "gfx2", 0 )
 2938      ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )    /* bg pattern B0 */
 2939      ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )    /* bg pattern B1 */
 2940  
 2941      ROM_REGION( 0xa000, "gfx3", 0 )
 2942      ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )    /* sprite set #1, planes 0/1 */
 2943      ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )    /* sprite set #2, planes 0/1 */
 2944      ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )    /* sprite set #3, planes 0/1 */
 2945      ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )    /* sprite set #1, plane 2, set #2, plane 2 */
 2946      /* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
 2947      ROM_FILL(                 0x9000, 0x1000, 0x00 )    // empty space to decode sprite set #3 as 3 bits per pixel
 2948  
 2949      ROM_REGION( 0x4000, "gfx4", 0 ) /* background tilemaps */
 2950      ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
 2951      ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
 2952      ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
 2953  
 2954      ROM_REGION( 0x0b00, "proms", 0 )
 2955      ROM_LOAD( "xvi-8.6a",     0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
 2956      ROM_LOAD( "xvi-9.6d",     0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
 2957      ROM_LOAD( "xvi-10.6e",    0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
 2958      ROM_LOAD( "xvi-7.4h",     0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
 2959      ROM_LOAD( "xvi-6.4f",     0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
 2960      ROM_LOAD( "xvi-4.3l",     0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
 2961      ROM_LOAD( "xvi-5.3m",     0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
 2962  
 2963      ROM_REGION( 0x0200, "namco", 0 )    /* sound PROMs */
 2964      ROM_LOAD( "xvi-2.7n",     0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
 2965      ROM_LOAD( "xvi-1.5n",     0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 2966  ROM_END
 2967  
 2968  /**********************************************************************************************
 2969    Dig Dug & clones
 2970  **********************************************************************************************/
 2971  
 2972  ROM_START( digdug )
 2973      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 2974      ROM_LOAD( "dd1a.1",       0x0000, 0x1000, CRC(a80ec984) SHA1(86689980410b9429cd7582c7a76342721c87d030) )
 2975      ROM_LOAD( "dd1a.2",       0x1000, 0x1000, CRC(559f00bd) SHA1(fde17785df21956d6fd06bcfe675c392dadb1524) )
 2976      ROM_LOAD( "dd1a.3",       0x2000, 0x1000, CRC(8cbc6fe1) SHA1(57b8a5777f8bb9773caf0cafe5408c8b9768cb25) )
 2977      ROM_LOAD( "dd1a.4",       0x3000, 0x1000, CRC(d066f830) SHA1(b0a615fe4a5c8742c1e4ef234ef34c369d2723b9) )
 2978  
 2979      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 2980      ROM_LOAD( "dd1a.5",       0x0000, 0x1000, CRC(6687933b) SHA1(c16144de7633595ddc1450ddce379f48e7b2195a) )
 2981      ROM_LOAD( "dd1a.6",       0x1000, 0x1000, CRC(843d857f) SHA1(89b2ead7e478e119d33bfd67376cdf28f83de67a) )
 2982  
 2983      ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU  */
 2984      ROM_LOAD( "dd1.7",        0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 2985  
 2986      ROM_REGION( 0x1000, "gfx1", 0 )
 2987      ROM_LOAD( "dd1.9",        0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )
 2988  
 2989      ROM_REGION( 0x4000, "gfx2", 0 )
 2990      ROM_LOAD( "dd1.15",       0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 2991      ROM_LOAD( "dd1.14",       0x1000, 0x1000, CRC(2829ec99) SHA1(3e435c1afb2e44487cd7ba28a93ada2e5ccbb86d) )
 2992      ROM_LOAD( "dd1.13",       0x2000, 0x1000, CRC(458499e9) SHA1(578bd839f9218c3cf4feee1223a461144e455df8) )
 2993      ROM_LOAD( "dd1.12",       0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 2994  
 2995      ROM_REGION( 0x1000, "gfx3", 0 )
 2996      ROM_LOAD( "dd1.11",       0x0000, 0x1000, CRC(7b383983) SHA1(57f1e8f5171d13f9f76bd091d81b4423b59f6b42) )
 2997  
 2998      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 2999      ROM_LOAD( "dd1.10b",      0x0000, 0x1000, CRC(2cf399c2) SHA1(317c48818992f757b1bd0e3997fa99937f81b52c) )
 3000  
 3001      ROM_REGION( 0x0220, "proms", 0 )
 3002      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3003      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3004      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3005  
 3006      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3007      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3008      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3009  ROM_END
 3010  
 3011  ROM_START( digdug1 )
 3012      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 3013      ROM_LOAD( "dd1.1",        0x0000, 0x1000, CRC(b9198079) SHA1(1d3fe04020f584ed250e32fdc6f6a3b769342884) )
 3014      ROM_LOAD( "dd1.2",        0x1000, 0x1000, CRC(b2acbe49) SHA1(c8f713e8cfa70d3bc64d3002ff7bffc65ee138e2) )
 3015      ROM_LOAD( "dd1.3",        0x2000, 0x1000, CRC(d6407b49) SHA1(0e71a8f02778286488865e20439776dbb2a8ec78) )
 3016      ROM_LOAD( "dd1.4b",       0x3000, 0x1000, CRC(f4cebc16) SHA1(19b568f92069a1cfe1c07287408efe3b0e253375) )
 3017  
 3018      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 3019      ROM_LOAD( "dd1.5b",       0x0000, 0x1000, CRC(370ef9b4) SHA1(746b1fa15f5f2cfd69d8b5a7d6fb8c770abc3b4d) )
 3020      ROM_LOAD( "dd1.6b",       0x1000, 0x1000, CRC(361eeb71) SHA1(372c97c666411c3590d790213ae6fa1ccb5ffa1c) )
 3021  
 3022      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 3023      ROM_LOAD( "dd1.7",        0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 3024  
 3025      ROM_REGION( 0x1000, "gfx1", 0 )
 3026      ROM_LOAD( "dd1.9",        0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )
 3027  
 3028      ROM_REGION( 0x4000, "gfx2", 0 )
 3029      ROM_LOAD( "dd1.15",       0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 3030      ROM_LOAD( "dd1.14",       0x1000, 0x1000, CRC(2829ec99) SHA1(3e435c1afb2e44487cd7ba28a93ada2e5ccbb86d) )
 3031      ROM_LOAD( "dd1.13",       0x2000, 0x1000, CRC(458499e9) SHA1(578bd839f9218c3cf4feee1223a461144e455df8) )
 3032      ROM_LOAD( "dd1.12",       0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 3033  
 3034      ROM_REGION( 0x1000, "gfx3", 0 )
 3035      ROM_LOAD( "dd1.11",       0x0000, 0x1000, CRC(7b383983) SHA1(57f1e8f5171d13f9f76bd091d81b4423b59f6b42) )
 3036  
 3037      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 3038      ROM_LOAD( "dd1.10b",      0x0000, 0x1000, CRC(2cf399c2) SHA1(317c48818992f757b1bd0e3997fa99937f81b52c) )
 3039  
 3040      ROM_REGION( 0x0220, "proms", 0 )
 3041      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3042      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3043      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3044  
 3045      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3046      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3047      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3048  ROM_END
 3049  
 3050  /*
 3051      Dig Dug - Atari Version
 3052  
 3053      There are two revisions of the board and the placement of the components
 3054      are different between the two versions.
 3055  
 3056      Revision A:
 3057          * The letter "A" is silkscreened in the A10 corner of the board.
 3058          * The 1st, 2nd and 3rd edition TM-203 and SP-203 manuals cover this board.
 3059  
 3060      Revision B:
 3061          * The letter "B" is silkscreened in the P12 corner (on right side of
 3062            the edge connector).
 3063          * Also, the three Z80's are located on the opposite side of the edge connector and
 3064            they are stacked in a column.  (The Z80's are oriented vertically instead of
 3065            horizontal as the other chips are.)
 3066          * The 4th edition TM-203 and SP-203 manuals cover this board.
 3067  */
 3068  
 3069  ROM_START( digdugat )
 3070      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 3071      ROM_LOAD( "136007.201",   0x0000, 0x1000, CRC(23d0b1a4) SHA1(a118d55e03a9ccf069f37c7bac2c9044dccd1f5e) )
 3072      ROM_LOAD( "136007.202",   0x1000, 0x1000, CRC(5453dc1f) SHA1(8be091dd53e9b44e80e1ac9b1751efbe832db78d) )
 3073      ROM_LOAD( "136007.203",   0x2000, 0x1000, CRC(c9077dfa) SHA1(611b3e1b575a51639530917366557773534c80aa) )
 3074      ROM_LOAD( "136007.204",   0x3000, 0x1000, CRC(a8fc8eac) SHA1(7a24197f4ec5989bc4d635b27b6578f4d62cb5f4) )
 3075  
 3076      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 3077      ROM_LOAD( "136007.205",   0x0000, 0x1000, CRC(5ba385c5) SHA1(f4577bddff74a14b13b212f5553fa13fe9ae4bcc) )
 3078      ROM_LOAD( "136007.206",   0x1000, 0x1000, CRC(382b4011) SHA1(2b79ddcf48177c99b5fa1f957374f4baa2bec143) )
 3079  
 3080      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 3081      ROM_LOAD( "136007.107",   0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 3082  
 3083      ROM_REGION( 0x1000, "gfx1", 0 )
 3084      ROM_LOAD( "136007.108",   0x0000, 0x0800, CRC(3d24a3af) SHA1(857ae93e2a41258a129dcecbaed2df359540b735) )
 3085  
 3086      ROM_REGION( 0x4000, "gfx2", 0 )
 3087      ROM_LOAD( "136007.116",   0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 3088      ROM_LOAD( "136007.117",   0x1000, 0x1000, CRC(a3bbfd85) SHA1(2105455762e0de120f2d943f9010a7d06c6b6448) )
 3089      ROM_LOAD( "136007.118",   0x2000, 0x1000, CRC(458499e9) SHA1(578bd839f9218c3cf4feee1223a461144e455df8) )
 3090      ROM_LOAD( "136007.119",   0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 3091  
 3092      ROM_REGION( 0x1000, "gfx3", 0 )
 3093      ROM_LOAD( "136007.115",   0x0000, 0x1000, CRC(754539be) SHA1(466ae754eb4721df8814d4d33a31d867507d45b3) )
 3094  
 3095      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 3096      ROM_LOAD( "136007.114",   0x0000, 0x1000, CRC(d6822397) SHA1(055ca6514141323f1e6dfcf91451507c04114d41) )
 3097  
 3098      ROM_REGION( 0x0220, "proms", 0 )
 3099      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3100      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3101      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3102  
 3103      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3104      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3105      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3106  ROM_END
 3107  
 3108  ROM_START( digdugat1 )
 3109      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 3110      ROM_LOAD( "136007.101",   0x0000, 0x1000, CRC(b9198079) SHA1(1d3fe04020f584ed250e32fdc6f6a3b769342884) )
 3111      ROM_LOAD( "136007.102",   0x1000, 0x1000, CRC(b2acbe49) SHA1(c8f713e8cfa70d3bc64d3002ff7bffc65ee138e2) )
 3112      ROM_LOAD( "136007.103",   0x2000, 0x1000, CRC(d6407b49) SHA1(0e71a8f02778286488865e20439776dbb2a8ec78) )
 3113      ROM_LOAD( "136007.104",   0x3000, 0x1000, CRC(b3ad42c3) SHA1(83ea80f0dd42ec1cb62e6ed45d5dda43ed21f567) )
 3114  
 3115      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 3116      ROM_LOAD( "136007.105",   0x0000, 0x1000, CRC(0a2aef4a) SHA1(ef40974fde8e8c305059e1dd03ea811a6aaca737) )
 3117      ROM_LOAD( "136007.106",   0x1000, 0x1000, CRC(a2876d6e) SHA1(08e8ac50918ae32dd6fb34e65534652beb0395b2) )
 3118  
 3119      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 3120      ROM_LOAD( "136007.107",   0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 3121  
 3122      ROM_REGION( 0x1000, "gfx1", 0 )
 3123      ROM_LOAD( "136007.108",   0x0000, 0x0800, CRC(3d24a3af) SHA1(857ae93e2a41258a129dcecbaed2df359540b735) )
 3124  
 3125      ROM_REGION( 0x4000, "gfx2", 0 )
 3126      ROM_LOAD( "136007.116",   0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 3127      ROM_LOAD( "136007.117",   0x1000, 0x1000, CRC(a3bbfd85) SHA1(2105455762e0de120f2d943f9010a7d06c6b6448) )
 3128      ROM_LOAD( "136007.118",   0x2000, 0x1000, CRC(458499e9) SHA1(578bd839f9218c3cf4feee1223a461144e455df8) )
 3129      ROM_LOAD( "136007.119",   0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 3130  
 3131      ROM_REGION( 0x1000, "gfx3", 0 )
 3132      ROM_LOAD( "136007.115",   0x0000, 0x1000, CRC(754539be) SHA1(466ae754eb4721df8814d4d33a31d867507d45b3) )
 3133  
 3134      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 3135      ROM_LOAD( "136007.114",   0x0000, 0x1000, CRC(d6822397) SHA1(055ca6514141323f1e6dfcf91451507c04114d41) )
 3136  
 3137      ROM_REGION( 0x0220, "proms", 0 )
 3138      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3139      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3140      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3141  
 3142      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3143      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3144      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3145  ROM_END
 3146  
 3147  /*
 3148      Zig Zag (Dig Dug bootleg)
 3149  */
 3150  
 3151  ROM_START( dzigzag )
 3152      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 3153      ROM_LOAD( "136007.101",   0x0000, 0x1000, CRC(b9198079) SHA1(1d3fe04020f584ed250e32fdc6f6a3b769342884) )
 3154      ROM_LOAD( "136007.102",   0x1000, 0x1000, CRC(b2acbe49) SHA1(c8f713e8cfa70d3bc64d3002ff7bffc65ee138e2) )
 3155      ROM_LOAD( "136007.103",   0x2000, 0x1000, CRC(d6407b49) SHA1(0e71a8f02778286488865e20439776dbb2a8ec78) )
 3156      ROM_LOAD( "zigzag4",      0x3000, 0x1000, CRC(da20d2f6) SHA1(4eafe5ee917060d01d9df92d678c455edbbf27a6) )
 3157  
 3158      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 3159      ROM_LOAD( "zigzag5",      0x0000, 0x2000, CRC(f803c748) SHA1(a4c7dde0b794366cbfd03f339de980a6575a42fc) )
 3160  
 3161      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 3162      ROM_LOAD( "136007.107",   0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 3163  
 3164      ROM_REGION( 0x10000, "sub3", 0 )    /* 64k for a Z80 which emulates the custom I/O chip (not used) */
 3165      ROM_LOAD( "zigzag7",      0x0000, 0x1000, CRC(24c3510c) SHA1(3214a16f697f88d23f3441e58c56110930d7c341) )
 3166  
 3167      ROM_REGION( 0x1000, "gfx1", 0 )
 3168      ROM_LOAD( "zigzag8",      0x0000, 0x0800, CRC(86120541) SHA1(c974441ee0421a38c25bc7c3edbc6b510b7df473) )
 3169  
 3170      ROM_REGION( 0x4000, "gfx2", 0 )
 3171      ROM_LOAD( "136007.116",   0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 3172      ROM_LOAD( "zigzag12",     0x1000, 0x1000, CRC(386a0956) SHA1(79f5d6af1fdc467a503216a588cb03535c823a40) )
 3173      ROM_LOAD( "zigzag13",     0x2000, 0x1000, CRC(69f6e395) SHA1(10a7518e963f2cecb494d77137e01a068116e20b) )
 3174      ROM_LOAD( "136007.119",   0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 3175  
 3176      ROM_REGION( 0x1000, "gfx3", 0 )
 3177      ROM_LOAD( "dd1.11",       0x0000, 0x1000, CRC(7b383983) SHA1(57f1e8f5171d13f9f76bd091d81b4423b59f6b42) )
 3178  
 3179      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 3180      ROM_LOAD( "dd1.10b",      0x0000, 0x1000, CRC(2cf399c2) SHA1(317c48818992f757b1bd0e3997fa99937f81b52c) )
 3181  
 3182      ROM_REGION( 0x0220, "proms", 0 )
 3183      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3184      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3185      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3186  
 3187      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3188      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3189      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3190  ROM_END
 3191  
 3192  /*
 3193  
 3194  Year:  1982
 3195  Manufacturer:  Sidam
 3196  
 3197  CPUs:
 3198  
 3199  on main PCB (Sidam 11500):
 3200  
 3201  3x MK3880-4IRL-Z80CPU (main)
 3202  1x LM324N (sound)
 3203  1x TDA2003 (sound)
 3204  1x custom 0640 (DIL28)(interface to custom 5303)
 3205  1x custom 0748 (DIL28)(clock divider)
 3206  3x custom 0883 (DIL28)(bus controller)
 3207  1x custom 5156 (DIL42)(I/O)
 3208  1x custom 5303 (DIL42)(I/O)
 3209  1x oscillator 18432
 3210  
 3211  on bottom PCB (Sidam 11510):
 3212  
 3213  1x custom 0037 (DIL28)(unknown)
 3214  1x custom 0228 (DIL28)(gfx data shifter and mixer(16-bit in, 4-bit out))
 3215  1x custom 0425 (DIL28)(sprite address generator)
 3216  1x custom 0764 (DIL28)(clock divider)
 3217  1x custom DD1-6 (DIL20 300mil)(unknown)
 3218  
 3219  ROMs:
 3220  
 3221  on main PCB (Sidam 11500):
 3222  
 3223  7x TMS2531JL
 3224  2x TBP24S10N (11220, 11221)
 3225  
 3226  on bottom PCB (Sidam 11510):
 3227  
 3228  1x TMS2516JL (8)
 3229  6x D2732A
 3230  1x TBP24S10N (11523)
 3231  1x SN74S288N (11524)
 3232  
 3233  Notes:
 3234  
 3235  on main PCB (Sidam 11500):
 3236  1x 22x2 edge connector
 3237  1x 3 legs power connector
 3238  1x 50 pins flat cable connector to bottom
 3239  1x trimmer (volume)
 3240  2x 8x2 switches DIP
 3241  
 3242  on bottom PCB (Sidam 11510):
 3243  1x 50 pins flat cable connector to main
 3244  1x 6 legs connector
 3245  
 3246  */
 3247  
 3248  ROM_START( digsid )
 3249      ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU  */
 3250      ROM_LOAD( "digdug0.0",   0x0000, 0x1000, CRC(602197f0) SHA1(bea3b98a3f0f89d3b9e87aa38550ddd6f7883921) )
 3251      ROM_LOAD( "digdug1.1",   0x1000, 0x1000, CRC(c6c8306b) SHA1(53e63ccb7edfdeea75df961ac69ebe882d808920) )
 3252      ROM_LOAD( "digdug2.2",   0x2000, 0x1000, CRC(b695ec17) SHA1(46811106dbb686df6dc73b29e9e7db97b8c0d412) )
 3253      ROM_LOAD( "digdug3.3",   0x3000, 0x1000, CRC(17bbfa40) SHA1(d3c7bf986d1d2b1961cea0c5e548245e84d74924) )
 3254  
 3255      ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
 3256      ROM_LOAD( "digdug4.4",       0x0000, 0x1000, CRC(370ef9b4) SHA1(746b1fa15f5f2cfd69d8b5a7d6fb8c770abc3b4d) )
 3257      ROM_LOAD( "digdug5.5",       0x1000, 0x1000, CRC(d751df5d) SHA1(b08becb0176849a0fd1a706d6fae862684ff00b9) )
 3258  
 3259      ROM_REGION( 0x10000, "sub2", 0 )    /* 64k for the third CPU  */
 3260      ROM_LOAD( "digdug6.6",   0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
 3261  
 3262      ROM_REGION( 0x1000, "gfx1", 0 )
 3263      ROM_LOAD( "digdug8.8",        0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )
 3264  
 3265      ROM_REGION( 0x4000, "gfx2", 0 )
 3266      ROM_LOAD( "digdug14.14",   0x0000, 0x1000, CRC(e22957c8) SHA1(4700c63f4f680cb8ab8c44e6f3e1712aabd5daa4) )
 3267      ROM_LOAD( "digdug13.13",   0x1000, 0x1000, CRC(2829ec99) SHA1(3e435c1afb2e44487cd7ba28a93ada2e5ccbb86d) )
 3268      ROM_LOAD( "digdug12.12",   0x2000, 0x1000, CRC(458499e9) SHA1(578bd839f9218c3cf4feee1223a461144e455df8) )
 3269      ROM_LOAD( "digdug11.11",   0x3000, 0x1000, CRC(c58252a0) SHA1(bd79e39e8a572d2b5c205e6de27ca23e43ec9f51) )
 3270  
 3271      ROM_REGION( 0x1000, "gfx3", 0 )
 3272      ROM_LOAD( "digdug10.10",       0x0000, 0x1000, CRC(7b383983) SHA1(57f1e8f5171d13f9f76bd091d81b4423b59f6b42) )
 3273  
 3274      ROM_REGION( 0x1000, "gfx4", 0 ) /* 4k for the playfield graphics */
 3275      ROM_LOAD( "digdug9.9",      0x0000, 0x1000, CRC(2cf399c2) SHA1(317c48818992f757b1bd0e3997fa99937f81b52c) )
 3276  
 3277      /* Proms were not dumped with this set */
 3278      ROM_REGION( 0x0220, "proms", 0 )
 3279      ROM_LOAD( "136007.113",   0x0000, 0x0020, CRC(4cb9da99) SHA1(91a5852a15d4672c29fdcbae75921794651f960c) )
 3280      ROM_LOAD( "136007.111",   0x0020, 0x0100, CRC(00c7c419) SHA1(7ea149e8eb36920c3b84984b5ce623729d492fd3) )
 3281      ROM_LOAD( "136007.112",   0x0120, 0x0100, CRC(e9b3e08e) SHA1(a294cc4da846eb702d61678396bfcbc87d30ea95) )
 3282  
 3283      ROM_REGION( 0x0200, "namco", 0 )    /* sound prom */
 3284      ROM_LOAD( "136007.110",   0x0000, 0x0100, CRC(7a2815b4) SHA1(085ada18c498fdb18ecedef0ea8fe9217edb7b46) )
 3285      ROM_LOAD( "136007.109",   0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )    /* timing - not used */
 3286  ROM_END
 3287  
 3288  DRIVER_INIT_MEMBER(galaga_state,galaga)
 3289  {
 3290      /* swap bytes for flipped character so we can decode them together with normal characters */
 3291      UINT8 *rom = machine().root_device().memregion("gfx1")->base();
 3292      int i, len = machine().root_device().memregion("gfx1")->bytes();
 3293  
 3294      for (i = 0;i < len;i++)
 3295      {
 3296          if ((i & 0x0808) == 0x0800)
 3297          {
 3298              int t = rom[i];
 3299              rom[i] = rom[i+8];
 3300              rom[i+8] = t;
 3301          }
 3302      }
 3303  }
 3304  
 3305  DRIVER_INIT_MEMBER(galaga_state,gatsbee)
 3306  {
 3307      DRIVER_INIT_CALL(galaga);
 3308  
 3309      /* Gatsbee has a larger character ROM, we need a handler for banking */
 3310      machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1000, 0x1000, write8_delegate(FUNC(galaga_state::gatsbee_bank_w),this));
 3311  }
 3312  
 3313  
 3314  DRIVER_INIT_MEMBER(xevious_state,xevious)
 3315  {
 3316      UINT8 *rom;
 3317      int i;
 3318  
 3319      rom = machine().root_device().memregion("gfx3")->base() + 0x5000;
 3320      for (i = 0;i < 0x2000;i++)
 3321          rom[i + 0x2000] = rom[i] >> 4;
 3322  }
 3323  
 3324  DRIVER_INIT_MEMBER(xevious_state,xevios)
 3325  {
 3326      int A;
 3327      UINT8 *rom;
 3328  
 3329  
 3330      /* convert one of the sprite ROMs to the format used by Xevious */
 3331      rom = machine().root_device().memregion("gfx3")->base();
 3332      for (A = 0x5000;A < 0x7000;A++)
 3333      {
 3334          rom[A] = BITSWAP8(rom[A],1,3,5,7,0,2,4,6);
 3335      }
 3336  
 3337      /* convert one of tile map ROMs to the format used by Xevious */
 3338      rom = machine().root_device().memregion("gfx4")->base();
 3339      for (A = 0x0000;A < 0x1000;A++)
 3340      {
 3341          rom[A] = BITSWAP8(rom[A],3,7,5,1,2,6,4,0);
 3342      }
 3343  
 3344      DRIVER_INIT_CALL(xevious);
 3345  }
 3346  
 3347  
 3348  DRIVER_INIT_MEMBER(xevious_state,battles)
 3349  {
 3350      /* replace the Namco I/O handlers with interface to the 4th CPU */
 3351      machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x7000, 0x700f, read8_delegate(FUNC(xevious_state::battles_customio_data0_r),this), write8_delegate(FUNC(xevious_state::battles_customio_data0_w),this) );
 3352      machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x7100, 0x7100, read8_delegate(FUNC(xevious_state::battles_customio0_r),this), write8_delegate(FUNC(xevious_state::battles_customio0_w),this) );
 3353  
 3354      DRIVER_INIT_CALL(xevious);
 3355  }
 3356  
 3357  
 3358  /* Original Namco hardware, with Namco Customs */
 3359  
 3360  //    YEAR, NAME,      PARENT,  MACHINE, INPUT,    INIT,    MONITOR,COMPANY,FULLNAME,FLAGS
 3361  GAME( 1981, bosco,     0,       bosco,   bosco, driver_device,    0,       ROT0,   "Namco", "Bosconian (new version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3362  GAME( 1981, boscoo,    bosco,   bosco,   bosco, driver_device,    0,       ROT0,   "Namco", "Bosconian (old version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3363  GAME( 1981, boscoo2,   bosco,   bosco,   bosco, driver_device,    0,       ROT0,   "Namco", "Bosconian (older version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3364  GAME( 1981, boscomd,   bosco,   bosco,   boscomd, driver_device,  0,       ROT0,   "Namco (Midway license)", "Bosconian (Midway, new version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3365  GAME( 1981, boscomdo,  bosco,   bosco,   boscomd, driver_device,  0,       ROT0,   "Namco (Midway license)", "Bosconian (Midway, old version)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3366  
 3367  GAME( 1981, galaga,    0,       galaga,  galaga, galaga_state,   galaga,  ROT90,  "Namco", "Galaga (Namco rev. B)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3368  GAME( 1981, galagao,   galaga,  galaga,  galaga, galaga_state,   galaga,  ROT90,  "Namco", "Galaga (Namco)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3369  GAME( 1981, galagamw,  galaga,  galaga,  galagamw, galaga_state, galaga,  ROT90,  "Namco (Midway license)", "Galaga (Midway set 1)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3370  GAME( 1981, galagamk,  galaga,  galaga,  galaga, galaga_state,   galaga,  ROT90,  "Namco (Midway license)", "Galaga (Midway set 2)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3371  GAME( 1981, galagamf,  galaga,  galaga,  galaga, galaga_state,   galaga,  ROT90,  "Namco (Midway license)", "Galaga (Midway set 1 with fast shoot hack)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
 3372  
 3373  GAME( 1982, xevious,   0,       xevious, xevious, xevious_state,  xevious, ROT90,  "Namco", "Xevious (Namco)", GAME_SUPPORTS_SAVE )
 3374  GAME( 1982, xeviousa,  xevious, xevious, xeviousa, xevious_state, xevious, ROT90,  "Namco (Atari license)", "Xevious (Atari, harder)", GAME_SUPPORTS_SAVE )
 3375  GAME( 1982, xeviousb,  xevious, xevious, xeviousb, xevious_state, xevious, ROT90,  "Namco (Atari license)", "Xevious (Atari)", GAME_SUPPORTS_SAVE )
 3376  GAME( 1982, xeviousc,  xevious, xevious, xeviousa, xevious_state, xevious, ROT90,  "Namco (Atari license)", "Xevious (Atari, Namco PCB)", GAME_SUPPORTS_SAVE )
 3377  GAME( 1984, sxevious,  xevious, xevious, sxevious, xevious_state, xevious, ROT90,  "Namco", "Super Xevious", GAME_SUPPORTS_SAVE )
 3378  GAME( 1984, sxeviousj, xevious, xevious, sxevious, xevious_state, xevious, ROT90,  "Namco", "Super Xevious (Japan)", GAME_SUPPORTS_SAVE )
 3379  
 3380  GAME( 1982, digdug,    0,       digdug,  digdug, driver_device,   0,       ROT90,  "Namco", "Dig Dug (rev 2)", GAME_SUPPORTS_SAVE )
 3381  GAME( 1982, digdug1,   digdug,  digdug,  digdug, driver_device,   0,       ROT90,  "Namco", "Dig Dug (rev 1)", GAME_SUPPORTS_SAVE )
 3382  GAME( 1982, digdugat,  digdug,  digdug,  digdug, driver_device,   0,       ROT90,  "Namco (Atari license)", "Dig Dug (Atari, rev 2)", GAME_SUPPORTS_SAVE )
 3383  GAME( 1982, digdugat1, digdug,  digdug,  digdug, driver_device,   0,       ROT90,  "Namco (Atari license)", "Dig Dug (Atari, rev 1)", GAME_SUPPORTS_SAVE )
 3384  GAME( 1982, digsid,    digdug,  digdug,  digdug, driver_device,   0,       ROT90,  "Namco (Sidam license)", "Dig Dug (manufactured by Sidam)", GAME_SUPPORTS_SAVE )
 3385  
 3386  /* Bootlegs with replacement I/O chips */
 3387  
 3388  GAME( 1981, gallag,    galaga,  galagab, galaga, galaga_state,   galaga,  ROT90,  "bootleg", "Gallag", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
 3389  GAME( 1984, gatsbee,   galaga,  galagab, gatsbee, galaga_state,  gatsbee, ROT90,  "hack", "Gatsbee", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
 3390  
 3391  GAME( 1982, xevios,    xevious, xevious, xevious, xevious_state,  xevios,  ROT90,  "bootleg", "Xevios", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
 3392  GAME( 1982, battles,   xevious, battles, xevious, xevious_state,  battles, ROT90,  "bootleg", "Battles", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
 3393  
 3394  GAME( 1982, dzigzag,   digdug,  dzigzag, digdug, driver_device,   0,       ROT90,  "bootleg", "Zig Zag (Dig Dug hardware)", GAME_SUPPORTS_SAVE )