Viewing File: <root>/src/mame/drivers/nwk-tr.c

    1      /*  Konami NWK-TR System
    2  
    3      Driver by Ville Linde
    4  
    5  
    6  
    7      Hardware overview:
    8  
    9      GN676 CPU Board:
   10      ----------------
   11          IBM PowerPC 403GA at 32MHz (main CPU)
   12          Motorola MC68EC000 at 16MHz (sound CPU)
   13          Konami K056800 (MIRAC), sound system interface
   14          Ricoh RF5c400 sound chip
   15          National Semiconductor ADC12138
   16  
   17      GN676 GFX Board:
   18      ----------------
   19          Analog Devices ADSP-21062 SHARC DSP at 36MHz
   20          Konami K001604 (2D tilemaps + 2x ROZ)
   21          Konami 0000033906 (PCI bridge)
   22          3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM
   23          2x 3DFX 500-0004-02 (Voodoo) TMU with 2MB RAM
   24  
   25      GN676 LAN Board:
   26      ----------------
   27          Xilinx XC5210 FPGA
   28          Xilinx XC5204 FPGA
   29  
   30  
   31  Konami 'NWK-TR' Hardware
   32  Konami, 1998-1999
   33  
   34  Known games on this hardware include....
   35  
   36  Game                      (C)      Year
   37  ---------------------------------------
   38  Racing Jam                Konami   1998
   39  Racing Jam : Chapter 2    Konami   1999
   40  Thrill Drive              Konami   1998
   41  
   42  PCB Layouts
   43  -----------
   44  
   45  Note, the top board is virtually identical to GN715 used on Hornet.
   46  Some extra RCA connectors have been added (for dual sound output), the LED and
   47  DIPSW are present on the main board (instead of on the filter board) and the
   48  SOIC8 chip (a secured PIC?) is not populated (the solder pads are there though).
   49  There's an extra sound IC AN7395S (it's not populated on Hornet).
   50  The PALs/PLDs are the same on NWK-TR and Hornet.
   51  
   52  
   53  Top Board
   54  GN676 PWB(A)B
   55  Konami 1997
   56  |--------------------------------------------------------------|
   57  | SP485CS CN10       CN11  7805  CN9          JP8 JP9 JP10 JP11|
   58  |CN19  7809                                              PAL1  |
   59  |CN21       JP13 PAL2             68EC000          EPROM.7S    |
   60  |   NE5532       PAL3                                      CN12|
   61  |           JP12  JP16    DRM1M4SJ8                        CN13|
   62  |   NE5532    AN7395S                 MASKROM.9P    MASKROM.9T |
   63  |     SM5877 JP15         RF5C400                              |
   64  |CN18                                 MASKROM.12P   MASKROM.12T|
   65  |     SM5877     16.9344MHz                                 CN7|
   66  |CN14            SRAM256K             MASKROM.14P   MASKROM.14T|
   67  |                                                              |
   68  |CN16            SRAM256K             MASKROM.16P   MASKROM.16T|
   69  |  ADC12138                                                    |
   70  |CN15         056800            JP5                            |
   71  |                               JP4                            |
   72  |CN17                  MACH111  JP3                |---------| |
   73  |   TEST_SW                         EPROM.22P      |         | |
   74  |CN1                   DRAM16X16                   |PPC403GA | |
   75  |                                   EPROM.25P      |         | |
   76  |                                                  |         | |
   77  |                      DRAM16X16    EPROM.27P      |---------| |
   78  | 4AK16                                                     JP6|
   79  |                                                              |
   80  |CN3                                                           |
   81  |          PAL4                     CN5               7.3728MHz|
   82  |          058232                                              |
   83  |                                                     50.000MHz|
   84  |CN2  RESET_SW                                     JP1  JP2    |
   85  |M48T58Y-70PC1  CN4          DSW(8) CN6               64.000MHz|
   86  |--------------------------------------------------------------|
   87  Notes:
   88        DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24)
   89         SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28)
   90        DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42)
   91      M48T58Y-70PC1 - ST Timekeeper RAM
   92          RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz
   93           056800 - Konami Custom (QFP80)
   94           058232 - Konami Custom Ceramic Package (SIL14)
   95         ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28)
   96          MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44)
   97          68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
   98         PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160)
   99         SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24)
  100            4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10)
  101         NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8)
  102          SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8)
  103          AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20)
  104             PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20)
  105             PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20)
  106             PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20)
  107             PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20)
  108              JP1 -       25M O O-O 32M
  109              JP2 -       25M O O-O 32M
  110              JP3 -        RW O O O RO
  111              JP4 - PROG  32M O O-O 16M
  112              JP5 - DATA  32M O-O O 16M
  113              JP6 - BOOT   16 O-O O 32
  114              JP7 - SRC DOUT2 O O-O 0
  115              JP8 -   64M&32M O-O O 16M
  116              JP9 -       64M O O-O 32M&16M
  117             JP10 -   64M&32M O-O O 16M
  118             JP11 -       64M O O-O 32M&16M
  119             JP12 -   through O-O O SP
  120             JP13 -   through O-O O SP
  121             JP14 -       WDT O O
  122             JP15 -      MONO O-O O SURR
  123             JP16 -      HIGH O O O MID (N/C LOW)
  124      CN1 to  CN3 - D-SUB Connectors
  125              CN4 - Multi-pin Connector for Network PCB
  126              CN5 - DIN96 connector (pads only, not used)
  127              CN6 - DIN96 joining connector to lower PCB
  128              CN7 - Multi-pin connector (pads only, not used)
  129      CN9 to CN13 - Power Connectors
  130      CN14 to CN17 - RCA Stereo Audio OUT
  131             CN18 - RCA Mono Audio OUT
  132             CN19 - USB Connector
  133  
  134  
  135  ROM Usage
  136  ---------
  137               |------------------------------- ROM Locations -------------------------------------|
  138  Game         27P     25P  22P   16P     14P     12P     9P      16T     14T     12T     9T  7S
  139  --------------------------------------------------------------------------------------------------
  140  Racing Jam   676NC01 -    -     676A09  676A10  -       -       676A04  676A05  -       -   676A08
  141  Racing Jam 2 888A01  -    -     888A09  888A10  -       -       676A04  676A05  888A06  -   888A08
  142  Thrill Drive 713BE01 -    -     713A09  713A10  -       -       713A04  713A05  -       -   713A08
  143  
  144  
  145  Bottom Board
  146  GN676 PWB(B)B
  147  |-------------------------------------------------------------------------------------------|
  148  |CN4          CN2      CN8               CN6                                             CN5|
  149  |JP1                        |---------|          4M_EDO   4M_EDO                            |
  150  |                           |         |     |----------|                                    |
  151  |  4M_EDO   4M_EDO          | TEXELFX |     |          |       4M_EDO    MASKROM.8X         |
  152  |CN3                        |         |     | PIXELFX  |                        MASKROM.8Y  |
  153  |  4M_EDO   4M_EDO          |         |     |          |                                    |
  154  |                           |---------|     |          |       4M_EDO                       |
  155  |  4M_EDO   4M_EDO                          |----------|                                    |
  156  |                           |---------|    50MHz         |--------|                         |
  157  |  4M_EDO   4M_EDO          |         |                  |KONAMI  |                         |
  158  |                           | TEXELFX |                  |33906   |      MASKROM.16X        |
  159  |                           |         |                  |        |            MASKROM.16Y  |
  160  |                           |         |  PLCC44_SOCKET   |--------| AM7201                  |
  161  | MC44200                   |---------|                                                     |
  162  |                                                                                           |
  163  |                                                                                           |
  164  |                             PAL3       256KSRAM                         36MHz             |
  165  |                                        256KSRAM    AM7201   AM7201    |-------------|     |
  166  |                                        256KSRAM                       |ANALOG       |     |
  167  |         256KSRAM         MACH111       256KSRAM    AM7201   AM7201    |DEVICES      |     |
  168  |         256KSRAM  AV9170                                              |ADSP-21062   |     |
  169  |                                                                       |SHARC        |     |
  170  |         |--------|                                                    |KS-160       |     |
  171  |         |KONAMI  |                                                    |-------------|     |
  172  |         |001604  |                        1MSRAM  1MSRAM  1MSRAM  1MSRAM                  |
  173  |1MSRAM   |        |                                        1MSRAM  1MSRAM  1MSRAM  1MSRAM  |
  174  |         |--------|                                                                        |
  175  |1MSRAM       256KSRAM                                               PAL1                   |
  176  |         256KSRAM 256KSRAM              JP2   CN1                   PAL2                   |
  177  |-------------------------------------------------------------------------------------------|
  178  Notes:
  179        4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
  180        1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
  181      256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28)
  182       TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208)
  183       PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240)
  184        001604 - Konami Custom (QFP208)
  185      MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
  186       MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44)
  187  PLCC44_SOCKET- empty PLCC44 socket
  188        AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
  189        AM7201 - AMD AM7201 FIFO (PLCC32)
  190          PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
  191          PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
  192          PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20)
  193           JP1 - SLV O O-O MST,TWN
  194           JP2 - SLV O O-O MST
  195           CN1 - 96 Pin joining connector to upper PCB
  196           CN2 - 8-Pin 24kHz RGB OUT
  197           CN3 - 15-Pin DSUB VGA Video MAIN OUT
  198           CN4 - 6-Pin Power Connector
  199           CN5 - 4-Pin Power Connector
  200           CN6 - 2-Pin Connector (Not Used)
  201           CN7 - 6-Pin Connector
  202  
  203  
  204  ROM Usage
  205  ---------
  206               |------ ROM Locations -------|
  207  Game         8X      8Y      16X     16Y
  208  -------------------------------------------
  209  Racing Jam   676A13  -       676A14  -
  210  Racing Jam 2 888A13  -       888A14  -
  211  Thrill Drive 713A13  -       713A14  -
  212  
  213  */
  214  
  215  #include "emu.h"
  216  #include "cpu/m68000/m68000.h"
  217  #include "cpu/powerpc/ppc.h"
  218  #include "cpu/sharc/sharc.h"
  219  #include "machine/adc1213x.h"
  220  #include "machine/k033906.h"
  221  #include "machine/konppc.h"
  222  #include "machine/timekpr.h"
  223  #include "sound/rf5c400.h"
  224  #include "sound/k056800.h"
  225  #include "video/voodoo.h"
  226  #include "video/konicdev.h"
  227  
  228  
  229  class nwktr_state : public driver_device
  230  {
  231  public:
  232      nwktr_state(const machine_config &mconfig, device_type type, const char *tag)
  233          : driver_device(mconfig, type, tag) ,
  234          m_work_ram(*this, "work_ram"){ }
  235  
  236      UINT8 m_led_reg0;
  237      UINT8 m_led_reg1;
  238      required_shared_ptr<UINT32> m_work_ram;
  239      emu_timer *m_sound_irq_timer;
  240      int m_fpga_uploaded;
  241      int m_lanc2_ram_r;
  242      int m_lanc2_ram_w;
  243      UINT8 *m_lanc2_ram;
  244      UINT32 *m_sharc_dataram;
  245      DECLARE_WRITE32_MEMBER(paletteram32_w);
  246      DECLARE_READ32_MEMBER(sysreg_r);
  247      DECLARE_WRITE32_MEMBER(sysreg_w);
  248      DECLARE_READ32_MEMBER(lanc1_r);
  249      DECLARE_WRITE32_MEMBER(lanc1_w);
  250      DECLARE_READ32_MEMBER(lanc2_r);
  251      DECLARE_WRITE32_MEMBER(lanc2_w);
  252      DECLARE_READ32_MEMBER(dsp_dataram_r);
  253      DECLARE_WRITE32_MEMBER(dsp_dataram_w);
  254      DECLARE_DRIVER_INIT(nwktr);
  255      virtual void machine_start();
  256      virtual void machine_reset();
  257      UINT32 screen_update_nwktr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
  258      TIMER_CALLBACK_MEMBER(irq_off);
  259  };
  260  
  261  
  262  
  263  
  264  
  265  WRITE32_MEMBER(nwktr_state::paletteram32_w)
  266  {
  267      COMBINE_DATA(&m_generic_paletteram_32[offset]);
  268      data = m_generic_paletteram_32[offset];
  269      palette_set_color_rgb(machine(), offset, pal5bit(data >> 10), pal5bit(data >> 5), pal5bit(data >> 0));
  270  }
  271  
  272  static void voodoo_vblank_0(device_t *device, int param)
  273  {
  274      device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, param);
  275  }
  276  
  277  
  278  UINT32 nwktr_state::screen_update_nwktr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
  279  {
  280      device_t *voodoo = machine().device("voodoo");
  281      device_t *k001604 = machine().device("k001604");
  282  
  283      bitmap.fill(machine().pens[0], cliprect);
  284  
  285      voodoo_update(voodoo, bitmap, cliprect);
  286  
  287      const rectangle &visarea = screen.visible_area();
  288      const rectangle tilemap_rect(visarea.min_x, visarea.max_x, visarea.min_y+16, visarea.max_y);
  289  
  290      k001604_draw_front_layer(k001604, bitmap, tilemap_rect);
  291  
  292      draw_7segment_led(bitmap, 3, 3, m_led_reg0);
  293      draw_7segment_led(bitmap, 9, 3, m_led_reg1);
  294      return 0;
  295  }
  296  
  297  /*****************************************************************************/
  298  
  299  READ32_MEMBER(nwktr_state::sysreg_r)
  300  {
  301      device_t *adc12138 = machine().device("adc12138");
  302      UINT32 r = 0;
  303      if (offset == 0)
  304      {
  305          if (ACCESSING_BITS_24_31)
  306          {
  307              r |= ioport("IN0")->read() << 24;
  308          }
  309          if (ACCESSING_BITS_16_23)
  310          {
  311              r |= ioport("IN1")->read() << 16;
  312          }
  313          if (ACCESSING_BITS_8_15)
  314          {
  315              r |= ioport("IN2")->read() << 8;
  316          }
  317          if (ACCESSING_BITS_0_7)
  318          {
  319              r |= adc1213x_do_r(adc12138, space, 0) | (adc1213x_eoc_r(adc12138, space, 0) << 2);
  320          }
  321      }
  322      else if (offset == 1)
  323      {
  324          if (ACCESSING_BITS_24_31)
  325          {
  326              r |= ioport("DSW")->read() << 24;
  327          }
  328      }
  329      return r;
  330  }
  331  
  332  WRITE32_MEMBER(nwktr_state::sysreg_w)
  333  {
  334      device_t *adc12138 = machine().device("adc12138");
  335      if( offset == 0 )
  336      {
  337          if (ACCESSING_BITS_24_31)
  338          {
  339              m_led_reg0 = (data >> 24) & 0xff;
  340          }
  341          if (ACCESSING_BITS_16_23)
  342          {
  343              m_led_reg1 = (data >> 16) & 0xff;
  344          }
  345          return;
  346      }
  347      if( offset == 1 )
  348      {
  349          if (ACCESSING_BITS_24_31)
  350          {
  351              int cs = (data >> 27) & 0x1;
  352              int conv = (data >> 26) & 0x1;
  353              int di = (data >> 25) & 0x1;
  354              int sclk = (data >> 24) & 0x1;
  355  
  356              adc1213x_cs_w(adc12138, space, 0, cs);
  357              adc1213x_conv_w(adc12138, space, 0, conv);
  358              adc1213x_di_w(adc12138, space, 0, di);
  359              adc1213x_sclk_w(adc12138, space, 0, sclk);
  360          }
  361          if (ACCESSING_BITS_0_7)
  362          {
  363              if (data & 0x80)    // CG Board 1 IRQ Ack
  364                  machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
  365              if (data & 0x40)    // CG Board 0 IRQ Ack
  366                  machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
  367  
  368              //set_cgboard_id((data >> 4) & 3);
  369          }
  370          return;
  371      }
  372  }
  373  
  374  
  375  static void lanc2_init(running_machine &machine)
  376  {
  377      nwktr_state *state = machine.driver_data<nwktr_state>();
  378      state->m_fpga_uploaded = 0;
  379      state->m_lanc2_ram_r = 0;
  380      state->m_lanc2_ram_w = 0;
  381      state->m_lanc2_ram = auto_alloc_array(machine, UINT8, 0x8000);
  382  }
  383  
  384  READ32_MEMBER(nwktr_state::lanc1_r)
  385  {
  386      switch (offset)
  387      {
  388          case 0x40/4:
  389          {
  390              UINT32 r = 0;
  391  
  392              r |= (m_fpga_uploaded) ? (1 << 6) : 0;
  393              r |= 1 << 5;
  394  
  395              return (r) << 24;
  396          }
  397  
  398          default:
  399          {
  400              //printf("lanc1_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
  401              return 0xffffffff;
  402          }
  403      }
  404  }
  405  
  406  WRITE32_MEMBER(nwktr_state::lanc1_w)
  407  {
  408      //printf("lanc1_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
  409  }
  410  
  411  READ32_MEMBER(nwktr_state::lanc2_r)
  412  {
  413      UINT32 r = 0;
  414  
  415      if (offset == 0)
  416      {
  417          if (ACCESSING_BITS_0_7)
  418          {
  419              r |= m_lanc2_ram[m_lanc2_ram_r & 0x7fff];
  420              m_lanc2_ram_r++;
  421          }
  422          else
  423          {
  424              r |= 0xffffff00;
  425          }
  426      }
  427  
  428      if (offset == 4)
  429      {
  430          if (ACCESSING_BITS_24_31)
  431          {
  432              r |= 0x00000000;
  433          }
  434      }
  435  
  436      //printf("lanc2_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
  437  
  438      return r;
  439  }
  440  
  441  WRITE32_MEMBER(nwktr_state::lanc2_w)
  442  {
  443      if (offset == 0)
  444      {
  445          if (ACCESSING_BITS_24_31)
  446          {
  447              UINT8 value = data >> 24;
  448  
  449              value = ((value >> 7) & 0x01) |
  450                      ((value >> 5) & 0x02) |
  451                      ((value >> 3) & 0x04) |
  452                      ((value >> 1) & 0x08) |
  453                      ((value << 1) & 0x10) |
  454                      ((value << 3) & 0x20) |
  455                      ((value << 5) & 0x40) |
  456                      ((value << 7) & 0x80);
  457  
  458              m_fpga_uploaded = 1;
  459  
  460              //printf("lanc2_fpga_w: %02X at %08X\n", value, space.device().safe_pc());
  461          }
  462          else if (ACCESSING_BITS_8_15)
  463          {
  464              m_lanc2_ram_r = 0;
  465              m_lanc2_ram_w = 0;
  466          }
  467          else if (ACCESSING_BITS_16_23)
  468          {
  469              m_lanc2_ram[2] = (data >> 20) & 0xf;
  470              m_lanc2_ram[3] = 0;
  471          }
  472          else if (ACCESSING_BITS_0_7)
  473          {
  474              m_lanc2_ram[m_lanc2_ram_w & 0x7fff] = data & 0xff;
  475              m_lanc2_ram_w++;
  476          }
  477          else
  478          {
  479              //printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
  480          }
  481      }
  482      if (offset == 4)
  483      {
  484          // TODO: check if these should be transferred via PPC DMA.
  485  
  486          if (mame_stricmp(machine().system().name, "thrilld") == 0 ||
  487              mame_stricmp(machine().system().name, "thrilldb") == 0 ||
  488              mame_stricmp(machine().system().name, "thrilldae") == 0)
  489          {
  490              m_work_ram[(0x3ffed0/4) + 0] = 0x472a3731;      // G*71
  491              m_work_ram[(0x3ffed0/4) + 1] = 0x33202020;      // 3
  492              m_work_ram[(0x3ffed0/4) + 2] = 0x2d2d2a2a;      // --**
  493              m_work_ram[(0x3ffed0/4) + 3] = 0x2a207878;      // *
  494  
  495              m_work_ram[(0x3fff40/4) + 0] = 0x47433731;      // GC71
  496              m_work_ram[(0x3fff40/4) + 1] = 0x33000000;      // 3
  497              m_work_ram[(0x3fff40/4) + 2] = 0x19994a41;      //   JA
  498              m_work_ram[(0x3fff40/4) + 3] = 0x4100a9b1;      // A
  499          }
  500          else if (mame_stricmp(machine().system().name, "racingj2") == 0)
  501          {
  502              m_work_ram[(0x3ffc80/4) + 0] = 0x47453838;      // GE88
  503              m_work_ram[(0x3ffc80/4) + 1] = 0x38003030;      // 8 00
  504              m_work_ram[(0x3ffc80/4) + 2] = 0x39374541;      // 97EA
  505              m_work_ram[(0x3ffc80/4) + 3] = 0x410058da;      // A
  506          }
  507      }
  508  
  509      //printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
  510  }
  511  
  512  /*****************************************************************************/
  513  
  514  TIMER_CALLBACK_MEMBER(nwktr_state::irq_off)
  515  {
  516      machine().device("audiocpu")->execute().set_input_line(param, CLEAR_LINE);
  517  }
  518  
  519  void nwktr_state::machine_start()
  520  {
  521      /* set conservative DRC options */
  522      ppcdrc_set_options(machine().device("maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
  523  
  524      /* configure fast RAM regions for DRC */
  525      ppcdrc_add_fastram(machine().device("maincpu"), 0x00000000, 0x003fffff, FALSE, m_work_ram);
  526  
  527      m_sound_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nwktr_state::irq_off),this));
  528  }
  529  
  530  static ADDRESS_MAP_START( nwktr_map, AS_PROGRAM, 32, nwktr_state )
  531      AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("work_ram")        /* Work RAM */
  532      AM_RANGE(0x74000000, 0x740000ff) AM_DEVREADWRITE_LEGACY("k001604", k001604_reg_r, k001604_reg_w)
  533      AM_RANGE(0x74010000, 0x74017fff) AM_RAM_WRITE(paletteram32_w) AM_SHARE("paletteram")
  534      AM_RANGE(0x74020000, 0x7403ffff) AM_DEVREADWRITE_LEGACY("k001604", k001604_tile_r, k001604_tile_w)
  535      AM_RANGE(0x74040000, 0x7407ffff) AM_DEVREADWRITE_LEGACY("k001604", k001604_char_r, k001604_char_w)
  536      AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE_LEGACY(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
  537      AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE_LEGACY(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
  538      AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ(sysreg_r)
  539      AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE(sysreg_w)
  540      AM_RANGE(0x7d020000, 0x7d021fff) AM_DEVREADWRITE8_LEGACY("m48t58", timekeeper_r, timekeeper_w, 0xffffffff)  /* M48T58Y RTC/NVRAM */
  541      AM_RANGE(0x7d030000, 0x7d030007) AM_DEVREAD_LEGACY("k056800", k056800_host_r)
  542      AM_RANGE(0x7d030000, 0x7d030007) AM_DEVWRITE_LEGACY("k056800", k056800_host_w)
  543      AM_RANGE(0x7d030008, 0x7d03000f) AM_DEVWRITE_LEGACY("k056800", k056800_host_w)
  544      AM_RANGE(0x7d040000, 0x7d04ffff) AM_READWRITE(lanc1_r, lanc1_w)
  545      AM_RANGE(0x7d050000, 0x7d05ffff) AM_READWRITE(lanc2_r, lanc2_w)
  546      AM_RANGE(0x7e000000, 0x7e7fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
  547      AM_RANGE(0x7f000000, 0x7f1fffff) AM_ROM AM_SHARE("share2")
  548      AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")    /* Program ROM */
  549  ADDRESS_MAP_END
  550  
  551  /*****************************************************************************/
  552  
  553  static ADDRESS_MAP_START( sound_memmap, AS_PROGRAM, 16, nwktr_state )
  554      AM_RANGE(0x000000, 0x07ffff) AM_ROM
  555      AM_RANGE(0x100000, 0x10ffff) AM_RAM     /* Work RAM */
  556      AM_RANGE(0x200000, 0x200fff) AM_DEVREADWRITE_LEGACY("rfsnd", rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
  557      AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE_LEGACY("k056800", k056800_sound_r, k056800_sound_w)
  558      AM_RANGE(0x600000, 0x600001) AM_NOP
  559  ADDRESS_MAP_END
  560  
  561  /*****************************************************************************/
  562  
  563  
  564  READ32_MEMBER(nwktr_state::dsp_dataram_r)
  565  {
  566      return m_sharc_dataram[offset] & 0xffff;
  567  }
  568  
  569  WRITE32_MEMBER(nwktr_state::dsp_dataram_w)
  570  {
  571      m_sharc_dataram[offset] = data;
  572  }
  573  
  574  static ADDRESS_MAP_START( sharc_map, AS_DATA, 32, nwktr_state )
  575      AM_RANGE(0x0400000, 0x041ffff) AM_READWRITE_LEGACY(cgboard_0_shared_sharc_r, cgboard_0_shared_sharc_w)
  576      AM_RANGE(0x0500000, 0x05fffff) AM_READWRITE(dsp_dataram_r, dsp_dataram_w)
  577      AM_RANGE(0x1400000, 0x14fffff) AM_RAM
  578      AM_RANGE(0x2400000, 0x27fffff) AM_DEVREADWRITE_LEGACY("voodoo", nwk_voodoo_0_r, nwk_voodoo_0_w)
  579      AM_RANGE(0x3400000, 0x34000ff) AM_READWRITE_LEGACY(cgboard_0_comm_sharc_r, cgboard_0_comm_sharc_w)
  580      AM_RANGE(0x3500000, 0x35000ff) AM_READWRITE_LEGACY(K033906_0_r, K033906_0_w)
  581      AM_RANGE(0x3600000, 0x37fffff) AM_ROMBANK("bank5")
  582  ADDRESS_MAP_END
  583  
  584  /*****************************************************************************/
  585  
  586  static INPUT_PORTS_START( nwktr )
  587      PORT_START("IN0")
  588      PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
  589      PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
  590      PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
  591      PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
  592      PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
  593      PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
  594      PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
  595      PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
  596  
  597      PORT_START("IN1")
  598      PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
  599  
  600      PORT_START("IN2")
  601      PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
  602      PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
  603      PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_7)
  604      PORT_SERVICE_NO_TOGGLE( 0x10, IP_ACTIVE_LOW )
  605      PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN )
  606  
  607      PORT_START("DSW")
  608      PORT_DIPNAME( 0x80, 0x00, "Test Mode" ) PORT_DIPLOCATION("SW:1")
  609      PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  610      PORT_DIPSETTING( 0x80, DEF_STR( On ) )
  611      PORT_DIPNAME( 0x40, 0x00, "Disable Machine Init" ) PORT_DIPLOCATION("SW:2")
  612      PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
  613      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  614      PORT_DIPNAME( 0x20, 0x20, "DIP3" ) PORT_DIPLOCATION("SW:3")
  615      PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
  616      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  617      PORT_DIPNAME( 0x10, 0x10, "DIP4" ) PORT_DIPLOCATION("SW:4")
  618      PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
  619      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  620      PORT_DIPNAME( 0x08, 0x08, "DIP5" ) PORT_DIPLOCATION("SW:5")
  621      PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  622      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  623      PORT_DIPNAME( 0x04, 0x04, "DIP6" ) PORT_DIPLOCATION("SW:6")
  624      PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
  625      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  626      PORT_DIPNAME( 0x02, 0x02, "DIP7" ) PORT_DIPLOCATION("SW:7")
  627      PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
  628      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  629      PORT_DIPNAME( 0x01, 0x01, "DIP8" ) PORT_DIPLOCATION("SW:8")
  630      PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
  631      PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  632  
  633      PORT_START("ANALOG1")       // Steering
  634      PORT_BIT( 0xfff, 0x800, IPT_PADDLE ) PORT_MINMAX(0x000, 0xfff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5)
  635  
  636      PORT_START("ANALOG2")       // Acceleration pedal
  637      PORT_BIT( 0xfff, 0x000, IPT_PEDAL ) PORT_MINMAX(0x000, 0xfff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5)
  638  
  639      PORT_START("ANALOG3")       // Foot brake pedal
  640      PORT_BIT( 0xfff, 0x000, IPT_PEDAL2 ) PORT_MINMAX(0x000, 0xfff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5)
  641  
  642      PORT_START("ANALOG4")       // Hand brake lever
  643      PORT_BIT( 0xfff, 0x000, IPT_AD_STICK_Y ) PORT_MINMAX(0x000, 0xfff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5)
  644  
  645      PORT_START("ANALOG5")       // Clutch pedal
  646      PORT_BIT( 0xfff, 0x000, IPT_PEDAL3 ) PORT_MINMAX(0x000, 0xfff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5)
  647  
  648  INPUT_PORTS_END
  649  
  650  static const sharc_config sharc_cfg =
  651  {
  652      BOOT_MODE_EPROM
  653  };
  654  
  655  
  656  static double adc12138_input_callback( device_t *device, UINT8 input )
  657  {
  658      int value = 0;
  659      switch (input)
  660      {
  661          case 0:     value = device->machine().root_device().ioport("ANALOG1")->read(); break;
  662          case 1:     value = device->machine().root_device().ioport("ANALOG2")->read(); break;
  663          case 2:     value = device->machine().root_device().ioport("ANALOG3")->read(); break;
  664          case 3:     value = device->machine().root_device().ioport("ANALOG4")->read(); break;
  665          case 4:     value = device->machine().root_device().ioport("ANALOG5")->read(); break;
  666      }
  667  
  668      return (double)(value) / 4095.0;
  669  }
  670  
  671  static const adc12138_interface nwktr_adc_interface = {
  672      adc12138_input_callback
  673  };
  674  
  675  static void sound_irq_callback(running_machine &machine, int irq)
  676  {
  677      nwktr_state *state = machine.driver_data<nwktr_state>();
  678      int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
  679  
  680      machine.device("audiocpu")->execute().set_input_line(line, ASSERT_LINE);
  681      state->m_sound_irq_timer->adjust(attotime::from_usec(5), line);
  682  }
  683  
  684  static const k056800_interface nwktr_k056800_interface =
  685  {
  686      sound_irq_callback
  687  };
  688  
  689  static const k033906_interface nwktr_k033906_interface =
  690  {
  691      "voodoo"
  692  };
  693  
  694  static const k001604_interface racingj_k001604_intf =
  695  {
  696      0, 1,   /* gfx index 1 & 2 */
  697      0, 1,       /* layer_size, roz_size */
  698      0       /* slrasslt hack */
  699  };
  700  
  701  static const k001604_interface thrilld_k001604_intf =
  702  {
  703      0, 1,   /* gfx index 1 & 2 */
  704      1, 1,       /* layer_size, roz_size */
  705      0       /* slrasslt hack */
  706  };
  707  
  708  void nwktr_state::machine_reset()
  709  {
  710      machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
  711  }
  712  
  713  static const voodoo_config voodoo_intf =
  714  {
  715      2, //               fbmem;
  716      2,//                tmumem0;
  717      2,//                tmumem1;
  718      "screen",//         screen;
  719      "dsp",//            cputag;
  720      voodoo_vblank_0,//  vblank;
  721      NULL,//             stall;
  722  };
  723  
  724  static MACHINE_CONFIG_START( nwktr, nwktr_state )
  725  
  726      /* basic machine hardware */
  727      MCFG_CPU_ADD("maincpu", PPC403GA, 64000000/2)   /* PowerPC 403GA 32MHz */
  728      MCFG_CPU_PROGRAM_MAP(nwktr_map)
  729  
  730      MCFG_CPU_ADD("audiocpu", M68000, 64000000/4)    /* 16MHz */
  731      MCFG_CPU_PROGRAM_MAP(sound_memmap)
  732  
  733      MCFG_CPU_ADD("dsp", ADSP21062, 36000000)
  734      MCFG_CPU_CONFIG(sharc_cfg)
  735      MCFG_CPU_DATA_MAP(sharc_map)
  736  
  737      MCFG_QUANTUM_TIME(attotime::from_hz(9000))
  738  
  739  
  740      MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
  741  
  742      MCFG_K033906_ADD("k033906_1", nwktr_k033906_interface)
  743  
  744      /* video hardware */
  745      MCFG_SCREEN_ADD("screen", RASTER)
  746      MCFG_SCREEN_REFRESH_RATE(60)
  747      MCFG_SCREEN_SIZE(512, 384)
  748      MCFG_SCREEN_VISIBLE_AREA(0, 511, 0, 383)
  749      MCFG_SCREEN_UPDATE_DRIVER(nwktr_state, screen_update_nwktr)
  750  
  751      MCFG_PALETTE_LENGTH(65536)
  752  
  753      MCFG_K001604_ADD("k001604", racingj_k001604_intf)
  754  
  755      MCFG_K056800_ADD("k056800", nwktr_k056800_interface, 64000000/4)
  756  
  757      MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
  758  
  759      MCFG_SOUND_ADD("rfsnd", RF5C400, 16934400)  // as per Guru readme above
  760      MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
  761      MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
  762  
  763      MCFG_M48T58_ADD( "m48t58" )
  764  
  765      MCFG_ADC12138_ADD( "adc12138", nwktr_adc_interface )
  766  MACHINE_CONFIG_END
  767  
  768  static MACHINE_CONFIG_DERIVED( thrilld, nwktr )
  769  
  770      MCFG_DEVICE_REMOVE("k001604")
  771      MCFG_K001604_ADD("k001604", thrilld_k001604_intf)
  772  MACHINE_CONFIG_END
  773  
  774  /*****************************************************************************/
  775  
  776  DRIVER_INIT_MEMBER(nwktr_state, nwktr)
  777  {
  778      init_konami_cgboard(machine(), 1, CGBOARD_TYPE_NWKTR);
  779      set_cgboard_texture_bank(machine(), 0, "bank5", memregion("user5")->base());
  780  
  781      m_sharc_dataram = auto_alloc_array(machine(), UINT32, 0x100000/4);
  782      m_led_reg0 = m_led_reg1 = 0x7f;
  783  
  784      lanc2_init(machine());
  785  }
  786  
  787  /*****************************************************************************/
  788  
  789  ROM_START(racingj)
  790      ROM_REGION32_BE(0x200000, "user1", 0)   /* PowerPC program roms */
  791      ROM_LOAD16_WORD_SWAP("676gnc01.27p", 0x000000, 0x200000, CRC(690346b5) SHA1(157ab6788382ef4f5a8772f08819f54d0856fcc8) )
  792  
  793      ROM_REGION32_BE(0x800000, "user2", 0)   /* Data roms */
  794      ROM_LOAD32_WORD_SWAP("676a04.16t", 0x000000, 0x200000, CRC(d7808cb6) SHA1(0668fae5bb94cc120fe196d4b18200f7b512317f) )
  795      ROM_LOAD32_WORD_SWAP("676a05.14t", 0x000002, 0x200000, CRC(fb4de1ad) SHA1(f6aa4eb1b5d22901a2aaf899ed3237a9dfdc55b5) )
  796  
  797      ROM_REGION32_BE(0x800000, "user5", 0)   /* CG Board texture roms */
  798      ROM_LOAD32_WORD_SWAP( "676a13.8x",  0x000000, 0x400000, CRC(29077763) SHA1(ee087ca0d41966ca0fd10727055bb1dcd05a0873) )
  799      ROM_LOAD32_WORD_SWAP( "676a14.16x", 0x000002, 0x400000, CRC(50a7e3c0) SHA1(7468a66111a3ddf7c043cd400fa175cae5f65632) )
  800  
  801      ROM_REGION(0x80000, "audiocpu", 0)  /* 68k program roms */
  802      ROM_LOAD16_WORD_SWAP( "676gna08.7s", 0x000000, 0x080000, CRC(8973f6f2) SHA1(f5648a7e0205f7e979ccacbb52936809ce14a184) )
  803  
  804      ROM_REGION(0x1000000, "rfsnd", 0)   /* PCM sample roms */
  805      ROM_LOAD( "676a09.16p", 0x000000, 0x400000, CRC(f85c8dc6) SHA1(8b302c80be309b5cc68b75945fcd7b87a56a4c9b) )
  806      ROM_LOAD( "676a10.14p", 0x400000, 0x400000, CRC(7b5b7828) SHA1(aec224d62e4b1e8fdb929d7947ce70d84ba676cf) )
  807  
  808      ROM_REGION(0x2000, "m48t58",0)
  809      ROM_LOAD( "676jac_m48t58y.35d", 0x000000, 0x002000, CRC(47e1628c) SHA1(7c42d06ae2f2cd24d083890f333552cbf4f1d3c9) )
  810  ROM_END
  811  
  812  ROM_START(racingj2j)
  813      ROM_REGION32_BE(0x200000, "user1", 0)   /* PowerPC program roms */
  814      ROM_LOAD16_WORD_SWAP("888a01.27p", 0x000000, 0x200000, CRC(d077890a) SHA1(08b252324cf46fbcdb95e8f9312287920cd87c5d) )
  815  
  816      ROM_REGION32_BE(0x800000, "user2", 0)   /* Data roms */
  817      ROM_LOAD32_WORD_SWAP( "676a04.16t", 0x000000, 0x200000, CRC(d7808cb6) SHA1(0668fae5bb94cc120fe196d4b18200f7b512317f) )
  818      ROM_LOAD32_WORD_SWAP( "676a05.14t", 0x000002, 0x200000, CRC(fb4de1ad) SHA1(f6aa4eb1b5d22901a2aaf899ed3237a9dfdc55b5) )
  819      ROM_LOAD32_WORD_SWAP( "888a06.12t", 0x400000, 0x200000, CRC(00cbec4d) SHA1(1ce7807d86e90edbf4eecba462a27c725f5ad862) )
  820  
  821      ROM_REGION32_BE(0x800000, "user5", 0)   /* CG Board Texture roms */
  822      ROM_LOAD32_WORD_SWAP( "888a13.8x",  0x000000, 0x400000, CRC(2292f530) SHA1(0f4d1332708fd5366a065e0a928cc9610558b42d) )
  823      ROM_LOAD32_WORD_SWAP( "888a14.16x", 0x000002, 0x400000, CRC(6a834a26) SHA1(d1fbd7ae6afd05f0edac4efde12a5a45aa2bc7df) )
  824  
  825      ROM_REGION(0x80000, "audiocpu", 0)  /* 68k program roms */
  826      ROM_LOAD16_WORD_SWAP( "888a08.7s", 0x000000, 0x080000, CRC(55fbea65) SHA1(ad953f758181731efccadcabc4326e6634c359e8) )
  827  
  828      ROM_REGION(0x1000000, "rfsnd", 0)   /* PCM sample roms */
  829      ROM_LOAD( "888a09.16p",   0x000000, 0x400000, CRC(11e2fed2) SHA1(24b8a367b59fedb62c56f066342f2fa87b135fc5) )
  830      ROM_LOAD( "888a10.14p",   0x400000, 0x400000, CRC(328ce610) SHA1(dbbc779a1890c53298c0db129d496df048929496) )
  831  
  832      ROM_REGION(0x2000, "m48t58",0)
  833      ROM_LOAD( "676eae_m48t58y.35d", 0x000000, 0x002000, CRC(f691f5ab) SHA1(e81f652c5caa2caa8bd1c6d6db488d849bda058e) )
  834  ROM_END
  835  
  836  ROM_START(racingj2)
  837      ROM_REGION32_BE(0x200000, "user1", 0)   /* PowerPC program roms */
  838      ROM_LOAD16_WORD_SWAP("888a01.27p", 0x000000, 0x200000, CRC(d077890a) SHA1(08b252324cf46fbcdb95e8f9312287920cd87c5d) )
  839  
  840      ROM_REGION32_BE(0x800000, "user2", 0) /* Data roms */
  841      ROM_LOAD32_WORD_SWAP( "676a04.16t", 0x000000, 0x200000, CRC(d7808cb6) SHA1(0668fae5bb94cc120fe196d4b18200f7b512317f) )
  842      ROM_LOAD32_WORD_SWAP( "676a05.14t", 0x000002, 0x200000, CRC(fb4de1ad) SHA1(f6aa4eb1b5d22901a2aaf899ed3237a9dfdc55b5) )
  843      ROM_LOAD32_WORD_SWAP( "888a06.12t", 0x400000, 0x200000, CRC(00cbec4d) SHA1(1ce7807d86e90edbf4eecba462a27c725f5ad862) )
  844  
  845      ROM_REGION32_BE(0x800000, "user5", 0)   /* CG Board Texture roms */
  846      ROM_LOAD32_WORD_SWAP( "888a13.8x",  0x000000, 0x400000, CRC(2292f530) SHA1(0f4d1332708fd5366a065e0a928cc9610558b42d) )
  847      ROM_LOAD32_WORD_SWAP( "888a14.16x", 0x000002, 0x400000, CRC(6a834a26) SHA1(d1fbd7ae6afd05f0edac4efde12a5a45aa2bc7df) )
  848  
  849      ROM_REGION(0x80000, "audiocpu", 0)  /* 68k program roms */
  850      ROM_LOAD16_WORD_SWAP( "888a08.7s", 0x000000, 0x080000, CRC(55fbea65) SHA1(ad953f758181731efccadcabc4326e6634c359e8) )
  851  
  852      ROM_REGION(0x1000000, "rfsnd", 0)   /* PCM sample roms */
  853      ROM_LOAD( "888a09.16p", 0x000000, 0x400000, CRC(11e2fed2) SHA1(24b8a367b59fedb62c56f066342f2fa87b135fc5) )
  854      ROM_LOAD( "888a10.14p", 0x400000, 0x400000, CRC(328ce610) SHA1(dbbc779a1890c53298c0db129d496df048929496) )
  855  
  856      ROM_REGION(0x2000, "m48t58",0)
  857      ROM_LOAD( "676jae_m48t58y.35d", 0x000000, 0x002000, CRC(1aa43a1f) SHA1(814b691b8a358bf1545a13d595d17070e612e9a4) )
  858  ROM_END
  859  
  860  ROM_START(thrilld)
  861      ROM_REGION32_BE(0x200000, "user1", 0)   /* PowerPC program roms */
  862      ROM_LOAD16_WORD_SWAP("713be01.27p", 0x000000, 0x200000, CRC(d84a7723) SHA1(f4e9e08591b7e5e8419266dbe744d56a185384ed) )
  863  
  864      ROM_REGION32_BE(0x800000, "user2", 0)   /* Data roms */
  865      ROM_LOAD32_WORD_SWAP("713a04.16t", 0x000000, 0x200000, CRC(c994aaa8) SHA1(d82b9930a11e5384ad583684a27c95beec03cd5a) )
  866      ROM_LOAD32_WORD_SWAP("713a05.14t", 0x000002, 0x200000, CRC(6f1e6802) SHA1(91f8a170327e9b4ee6a64aee0c106b981a317e69) )
  867  
  868      ROM_REGION32_BE(0x800000, "user5", 0)   /* CG Board Texture roms */
  869      ROM_LOAD32_WORD_SWAP( "713a13.8x",    0x000000, 0x400000, CRC(b795c66b) SHA1(6e50de0d5cc444ffaa0fec7ada8c07f643374bb2) )
  870      ROM_LOAD32_WORD_SWAP( "713a14.16x",   0x000002, 0x400000, CRC(5275a629) SHA1(16fadef06975f0f3625cac8f84e2e77ed7d75e15) )
  871  
  872      ROM_REGION(0x80000, "audiocpu", 0)  /* 68k program roms */
  873      ROM_LOAD16_WORD_SWAP( "713a08.7s", 0x000000, 0x080000, CRC(6a72a825) SHA1(abeac99c5343efacabcb0cdff6d34f9f967024db) )
  874  
  875      ROM_REGION(0x1000000, "rfsnd", 0)   /* PCM sample roms */
  876      ROM_LOAD( "713a09.16p", 0x000000, 0x400000, CRC(058f250a) SHA1(63b8e60004ec49009633e86b4992c00083def9a8) )
  877      ROM_LOAD( "713a10.14p", 0x400000, 0x400000, CRC(27f9833e) SHA1(1540f00d2571ecb81b914c553682b67fca94bbbd) )
  878  
  879      ROM_REGION(0x2000, "m48t58",0)
  880      ROM_LOAD( "713jae_m48t58y.35d", 0x000000, 0x002000, CRC(5d8fbcb2) SHA1(74ad91544d2a200cf599a565005476623075e7d6) )
  881  ROM_END
  882  
  883  ROM_START(thrilldb)
  884      ROM_REGION32_BE(0x200000, "user1", 0)   /* PowerPC program roms */
  885      ROM_LOAD16_WORD_SWAP("713bb01.27p", 0x000000, 0x200000, CRC(535fe4e8) SHA1(acd8